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panic: handlers can now be placed in flash
By unchecking "Place panic handler code in IRAM" in the menuconfig, the panic handlers will be placed in flash. Of course, flash cache must be activated when entering panic handlers.
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@@ -67,7 +67,7 @@ Behavior of panic handler is affected by two other configuration options.
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- If :ref:`CONFIG_ESP_PANIC_HANDLER_IRAM` is disabled (disabled by default), the panic handler code is placed in flash memory not IRAM. This means that if ESP-IDF crashes while flash cache is disabled, the panic handler will automatically re-enable flash cache before running GDB Stub or Core Dump. This adds some minor risk, if the flash cache status is also corrupted during the crash.
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If this option is enabled, the panic handler code is placed in IRAM. This allows the panic handler to run without needing to re-enable cache first. This may be necessary to debug some complex issues with crashes while flash cache is disabled (for example, when writing to SPI flash).
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If this option is enabled, the panic handler code (including required UART functions) is placed in IRAM. This may be necessary to debug some complex issues with crashes while flash cache is disabled (for example, when writing to SPI flash) or when flash cache is corrupted when an exception is triggered.
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The following diagram illustrates panic handler behavior:
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