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Initial public version
This commit is contained in:
Ivan Grokhotkov
259
components/esp32/cpu_start.c
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259
components/esp32/cpu_start.c
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// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <string.h>
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#include "esp_attr.h"
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#include "esp_err.h"
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#include "rom/ets_sys.h"
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#include "soc/dport_reg.h"
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#include "soc/io_mux_reg.h"
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/semphr.h"
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#include "freertos/queue.h"
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#include "freertos/portmacro.h"
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#include "tcpip_adapter.h"
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#include "heap_alloc_caps.h"
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#include "sdkconfig.h"
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#include "esp_system.h"
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#include "esp_spi_flash.h"
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#include "nvs_flash.h"
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#include "esp_event.h"
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static void IRAM_ATTR user_start_cpu0(void);
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static void IRAM_ATTR call_user_start_cpu1();
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static void IRAM_ATTR user_start_cpu1(void);
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void Cache_Read_Enable();
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extern void ets_setup_syscalls(void);
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extern int __cpu1_entry_point;
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extern int _bss_start;
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extern int _bss_end;
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extern int _init_start;
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extern int _init_end;
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extern int _iram_romjumptable_start;
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extern int _iram_romjumptable_end;
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extern int _iram_text_start;
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extern int _iram_text_end;
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/*
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We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
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flash cache is down and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
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*/
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void Uart_Init(int no);
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void uartAttach();
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void ets_set_appcpu_boot_addr(uint32_t ent);
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int ets_getAppEntry();
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void IRAM_ATTR call_user_start_cpu0() {
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//Kill wdt
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REG_CLR_BIT(0x3ff4808c, BIT(10)); //RTCCNTL+8C RTC_WDTCONFIG0 RTC_
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REG_CLR_BIT(0x6001f048, BIT(14)); //DR_REG_BB_BASE+48
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//Move exception vectors to IRAM
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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uartAttach();
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ets_install_uart_printf();
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//Make page 0 access raise an exception
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//Also some other unused pages so we can catch weirdness
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//ToDo: this but nicer.
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asm volatile (\
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"movi a4,0x00000000\n" \
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"movi a5,0xf\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0x80000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0xa0000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0xc0000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0xe0000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0x20000000\n" \
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"movi a5,0x0\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0x40000000\n" \
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"movi a5,0x2\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"isync\n" \
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:::"a4","a5");
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memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
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//Initialize heap allocator
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heap_alloc_caps_init();
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ets_printf("Pro cpu up.\n");
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#ifndef CONFIG_FREERTOS_UNICORE
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ets_printf("Running app cpu, entry point is %p\n", call_user_start_cpu1);
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ets_delay_us(60000);
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SET_PERI_REG_MASK(APPCPU_CTRL_REG_B, DPORT_APPCPU_CLKGATE_EN);
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SET_PERI_REG_MASK(APPCPU_CTRL_REG_A, DPORT_APPCPU_RESETTING);
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CLEAR_PERI_REG_MASK(APPCPU_CTRL_REG_A, DPORT_APPCPU_RESETTING);
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for (int i=0; i<20; i++) ets_delay_us(40000);
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ets_set_appcpu_boot_addr((uint32_t)call_user_start_cpu1);
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ets_delay_us(10000);
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// while (ets_getAppEntry()==(int)call_user_start_cpu1) ;
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//Because of Reasons (tm), the pro cpu cannot use the SPI flash while the app cpu is booting.
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// while(((READ_PERI_REG(RTC_STORE7))&BIT(31)) == 0) ; // check APP boot complete flag
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ets_delay_us(50000);
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ets_delay_us(50000);
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ets_printf("\n\nBack to pro cpu.\n");
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#else
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CLEAR_PERI_REG_MASK(APPCPU_CTRL_REG_B, DPORT_APPCPU_CLKGATE_EN);
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#endif
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user_start_cpu0();
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}
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extern int xPortGetCoreID();
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extern int _init_start;
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/*
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We arrive here because the pro CPU pulled us from reset. IRAM is in place, cache is still disabled, we can execute C code.
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*/
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void IRAM_ATTR call_user_start_cpu1() {
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//We need to do this ASAP because otherwise the structure to catch the SYSCALL instruction, which
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//we abuse to do ROM calls, won't work.
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asm volatile (\
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"wsr %0, vecbase\n" \
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::"r"(&_init_start));
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//Enable SPI flash
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA3_U, FUNC_SD_DATA3_SPIWP); // swap PIN SDDATA3 from uart1 to spi, because cache need spi
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ets_printf("App cpu up\n");
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//Make page 0 access raise an exception
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//Also some other unused pages so we can catch weirdness
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//ToDo: this but nicer.
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asm volatile (\
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"movi a4,0x00000000\n" \
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"movi a5,0xf\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0x80000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0xa0000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0xc0000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0xe0000000\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0x20000000\n" \
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"movi a5,0x0\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"movi a4,0x40000000\n" \
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"movi a5,0x2\n" \
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"wdtlb a5,a4\n" \
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"witlb a5,a4\n" \
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"isync\n" \
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:::"a4","a5");
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user_start_cpu1();
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}
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extern volatile int port_xSchedulerRunning;
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extern int xPortStartScheduler();
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void user_start_cpu1(void) {
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ets_printf("App cpu is running!\n");
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//Wait for the freertos initialization is finished on CPU0
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while (port_xSchedulerRunning == 0) ;
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ets_printf("Core0 started initializing FreeRTOS. Jumping to scheduler.\n");
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//Okay, start the scheduler!
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xPortStartScheduler();
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}
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extern void (*__init_array_start)(void);
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extern void (*__init_array_end)(void);
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extern esp_err_t app_main();
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static void do_global_ctors(void) {
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void (**p)(void);
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for(p = &__init_array_start; p != &__init_array_end; ++p)
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(*p)();
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}
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void user_start_cpu0(void) {
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esp_err_t ret;
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ets_setup_syscalls();
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do_global_ctors();
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#if 1 //workaround
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for (uint8_t i = 5; i < 8; i++) {
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ets_printf("erase sector %d\n", i);
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spi_flash_erase_sector(i);
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}
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#endif
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ets_printf("nvs_flash_init\n");
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ret = nvs_flash_init(5, 3);
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if (ESP_OK != ret) {
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ets_printf("nvs_flash_init fail, ret=%d\n", ret);
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}
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system_init();
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esp_event_init(NULL);
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// TODO: consider ethernet interface
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#if CONFIG_WIFI_ENABLED
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tcpip_adapter_init();
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#endif
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#if CONFIG_WIFI_ENABLED && CONFIG_WIFI_AUTO_STARTUP
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#include "esp_wifi.h"
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esp_wifi_startup(app_main);
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#else
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app_main();
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#endif
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vTaskStartScheduler();
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}
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