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Merge branch 'feature/xtwdt' into 'master'
WDT: Add support for XTAL32K Watchdog timer Closes IDF-2575 See merge request espressif/esp-idf!15000
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@@ -4,7 +4,7 @@ Watchdogs
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Overview
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--------
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The ESP-IDF has support for two types of watchdogs: The Interrupt Watchdog Timer
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The ESP-IDF has support for multiple types of watchdogs, with the two main ones being: The Interrupt Watchdog Timer
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and the Task Watchdog Timer (TWDT). The Interrupt Watchdog Timer and the TWDT
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can both be enabled using :ref:`project-configuration-menu`, however the TWDT can also be
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enabled during runtime. The Interrupt Watchdog is responsible for detecting
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@@ -101,13 +101,13 @@ timeout at runtime by calling :cpp:func:`esp_task_wdt_init`.
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The following config options control TWDT configuration at startup. They are all enabled by default:
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{IDF_TARGET_IDLE_TASK:default="Idle task", esp32="CPU0 Idle task"}
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{IDF_TARGET_IDLE_TASK:default="Idle task", esp32="CPU0 Idle task", esp32s3="CPU0 Idle task"}
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.. list::
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- :ref:`CONFIG_ESP_TASK_WDT` - the TWDT is initialized automatically during startup. If this option is disabled, it is still possible to initialize the Task WDT at runtime by calling :cpp:func:`esp_task_wdt_init`.
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- :ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0` - {IDF_TARGET_IDLE_TASK} is subscribed to the TWDT during startup. If this option is disabled, it is still possible to subscribe the idle task by calling :cpp:func:`esp_task_wdt_add` at any time.
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:esp32: - :ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1` - CPU1 Idle task is subscribed to the TWDT during startup.
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:not CONFIG_FREERTOS_UNICORE: - :ref:`CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1` - CPU1 Idle task is subscribed to the TWDT during startup.
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JTAG and watchdogs
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@@ -124,6 +124,26 @@ panics from either watchdogs will be generated when the {IDF_TARGET_NAME} is con
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OpenOCD via JTAG.
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.. only:: SOC_XT_WDT_SUPPORTED
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XTAL32K Watchdog Timer (XTWDT)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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The XTAL32K watchdog makes sure the (optional) external 32 KHz crystal or oscillator is functioning correctly.
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When `XTAL32K_CLK` works as the clock source of `RTC_SLOW_CLK` and stops oscillating, the XTAL32K watchdog timer will detect this and generate an interrupt.
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It also provides functionality for automatically switching over to the internal, but less accurate oscillator as the `RTC_SLOW_CLK` source.
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Since the switch to the backup clock is done in hardware it can also happen during deep sleep. This means that even if `XTAL32K_CLK` stops functioning while the chip in deep sleep, waiting for a timer to expire, it will still be able to wake-up as planned.
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If the `XTAL32K_CLK` starts functioning normally again, you can call `esp_xt_wdt_restore_clk` to switch back to this clock source and re-enable the watchdog timer.
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Configuration
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@@@@@@@@@@@@@
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When the external 32KHz crystal or oscillator is selected (:ref:`CONFIG_{IDF_TARGET_CFG_PREFIX}_RTC_CLK_SRC`) the XTAL32K watchdog can be enabled via the :ref:`CONFIG_ESP_XT_WDT` configuration
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flag. The timeout is configured by setting :ref:`CONFIG_ESP_XT_WDT_TIMEOUT`. The automatic backup clock functionality is enabled via the ref:`CONFIG_ESP_XT_WDT_BACKUP_CLK_ENABLE` configuration.
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Interrupt Watchdog API Reference
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--------------------------------
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