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soc: Add a soc cap, SOC_CLK_RC_FAST_D256_SUPPORTED, for whether the target has the RC_FAST_D256 clock

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This commit is contained in:
Song Ruo Jing
2022-10-27 17:18:17 +08:00
parent 2557e24a28
commit be0fdfa176
38 changed files with 170 additions and 145 deletions
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12
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
View File

@@ -495,10 +495,6 @@ config SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM
int
default 108
config SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256
bool
default y
config SOC_RTCIO_PIN_COUNT
int
default 0
@@ -803,6 +799,14 @@ config SOC_PM_SUPPORT_BT_PD
bool
default y
config SOC_CLK_RC_FAST_D256_SUPPORTED
bool
default y
config SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256
bool
default y
config SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC
bool
default y

6
components/soc/esp32c3/include/soc/soc_caps.h
View File

@@ -227,8 +227,6 @@
#define SOC_RTC_CNTL_CPU_PD_RETENTION_MEM_SIZE (SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM * (SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH >> 3))
#define SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256 (1)
/*-------------------------- RTCIO CAPS --------------------------------------*/
/* No dedicated RTCIO subsystem on ESP32-C3. RTC functions are still supported
* for hold, wake & 32kHz crystal functions - via rtc_cntl_reg */
@@ -371,6 +369,10 @@
#define SOC_PM_SUPPORT_BT_PD (1)
/*--------------------------- CLOCK SUBSYSTEM CAPS -------------------------- */
#define SOC_CLK_RC_FAST_D256_SUPPORTED (1)
#define SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256 (1)
/*-------------------------- Temperature Sensor CAPS -------------------------------------*/
#define SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC (1)
#define SOC_TEMPERATURE_SENSOR_SUPPORT_XTAL (1)