Merge branch 'feature/intr_alloc' into 'master'

Add dynamic interrupt allocation mechanism

This adds:
- Dynamic allocation of interrupts. Pass it the features of the interrupt you want, it'll set you up with an int.
- Shared interrupts. Enables multiple peripheral drivers to use the same interrupt. 
- Marking what interrupts are fully executable from IRAM; if an int isn't marked like that it will get disabled once flash cache gets disabled.

Also:
- Modifies driver to be in line with these changes

See merge request !254

components/mbedtls/Kconfig

@@ -61,14 +61,6 @@ config MBEDTLS_MPI_USE_INTERRUPT
         This allows other code to run on the CPU while an MPI operation is pending.
         Otherwise the CPU busy-waits.
 
-config MBEDTLS_MPI_INTERRUPT_NUM
-    int "MPI Interrupt number"
-    depends on MBEDTLS_MPI_USE_INTERRUPT
-    default 18
-    help
-        CPU interrupt number for MPI interrupt to connect to. Must be otherwise unused.
-        Eventually this assignment will be handled automatically at runtime.
-
 config MBEDTLS_HARDWARE_SHA
    bool "Enable hardware SHA acceleration"
    default y

components/mbedtls/port/esp_bignum.c

@@ -32,6 +32,7 @@
 #include "esp_system.h"
 #include "esp_log.h"
 #include "esp_intr.h"
+#include "esp_intr_alloc.h"
 #include "esp_attr.h"
 
 #include "soc/dport_reg.h"
@@ -59,10 +60,7 @@ static void rsa_isr_initialise()
 {
     if (op_complete_sem == NULL) {
         op_complete_sem = xSemaphoreCreateBinary();
-        intr_matrix_set(xPortGetCoreID(), ETS_RSA_INTR_SOURCE, CONFIG_MBEDTLS_MPI_INTERRUPT_NUM);
-        xt_set_interrupt_handler(CONFIG_MBEDTLS_MPI_INTERRUPT_NUM, &rsa_complete_isr, NULL);
-        xthal_set_intclear(1 << CONFIG_MBEDTLS_MPI_INTERRUPT_NUM);
-        xt_ints_on(1 << CONFIG_MBEDTLS_MPI_INTERRUPT_NUM);
+        esp_intr_alloc(ETS_RSA_INTR_SOURCE, 0, rsa_complete_isr, NULL, NULL);
     }
 }