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Merge branch 'feat/support_hysteresis_filter_on_c61' into 'master'

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feat(gpio): support hysteresis filter on C61

See merge request espressif/esp-idf!32881
This commit is contained in:
Gao Xu
2024-08-22 19:30:16 +08:00
parent 6f704a47e8 004f27efda
commit bf7f146cc8
5 changed files with 52 additions and 21 deletions
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4
components/soc/esp32c61/include/soc/Kconfig.soc_caps.in
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@@ -239,6 +239,10 @@ config SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
bool
default y
config SOC_GPIO_SUPPORT_PIN_HYS_FILTER
bool
default y
config SOC_GPIO_SUPPORT_RTC_INDEPENDENT
bool
default y

4
components/soc/esp32c61/include/soc/io_mux_struct.h
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@@ -102,8 +102,8 @@ typedef union {
uint32_t gpion_hys_en:1;
/** gpion_hys_sel : R/W; bitpos: [17]; default: 0;
* Configures to choose the signal for enabling the hysteresis function for GPIOn. \\
* 0: Choose the output enable signal of eFuse\\
* 1: Choose the output enable signal of IO_MUX_GPIOn_HYS_EN\\
* 0: Choose the output enable signal of eFuse, there is no efuse bit for it, should never set to 0\\
* 1: Choose the output enable signal of IO_MUX_GPIOn_HYS_EN, always set to 1\\
*/
uint32_t gpion_hys_sel:1;
uint32_t reserved_18:14;

1
components/soc/esp32c61/include/soc/soc_caps.h
View File

@@ -163,6 +163,7 @@
#define SOC_GPIO_PORT 1U
#define SOC_GPIO_PIN_COUNT 22
#define SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER 1
#define SOC_GPIO_SUPPORT_PIN_HYS_FILTER 1
// GPIO peripheral has the ETM extension
// \#define SOC_GPIO_SUPPORT_ETM 1 //TODO: [ESP32C61] IDF-9318