fix(esp32c5): fixed the lack of crosscore ll on c5

components/esp_hw_support/port/esp32c5/CMakeLists.txt

@@ -6,6 +6,12 @@ set(srcs "rtc_clk_init.c"
          "chip_info.c"
          )
 
+# TODO: [ESP32C5] IDF-8667
+if(IDF_TARGET STREQUAL "esp32c5")
+    list(REMOVE_ITEM srcs "pmu_init.c"
+                          "pmu_param.c")
+endif()
+
 if(NOT BOOTLOADER_BUILD)
     list(APPEND srcs "sar_periph_ctrl.c"
                      "esp_crypto_lock.c")

components/esp_hw_support/port/esp32c5/private_include/pmu_param.h

@@ -10,10 +10,8 @@
 #include <stdlib.h>
 #include <esp_types.h>
 #include "soc/soc_caps.h"
-#if SOC_PMU_SUPPORTED
 #include "soc/pmu_struct.h"
 #include "hal/pmu_hal.h"
-#endif
 
 // TODO: [ESP32C5] IDF-8643
 
@@ -25,8 +23,6 @@ extern "C" {
 #define HP_CALI_DBIAS   25
 #define LP_CALI_DBIAS   26
 
-#if SOC_PMU_SUPPORTED
-
 // FOR  XTAL FORCE PU IN SLEEP
 #define PMU_PD_CUR_SLEEP_ON    0
 #define PMU_BIASSLP_SLEEP_ON   0
@@ -474,8 +470,6 @@ typedef struct pmu_sleep_machine_constant {
     }                                           \
 }
 
-#endif  // SOC_PMU_SUPPORTED
-
 #ifdef __cplusplus
 }
 #endif

components/esp_hw_support/port/esp32c5/rtc_clk_init.c

@@ -23,7 +23,6 @@
 #include "hal/clk_tree_ll.h"
 #include "hal/modem_syscon_ll.h"
 #include "hal/modem_lpcon_ll.h"
-#include "soc/pmu_reg.h"
 #include "pmu_param.h"
 
 static const char *TAG = "rtc_clk_init";
@@ -42,6 +41,10 @@ static const char *TAG = "rtc_clk_init";
  */
 static void rtc_clk_modem_clock_domain_active_state_icg_map_preinit(void)
 {
+// If PMU has not supported yet, the enum has not declared, use macro instead
+#ifndef ESP_PMU_ENUMS_DECLARED
+#define PMU_HP_ICG_MODEM_CODE_ACTIVE 2
+#endif
     /* Configure modem ICG code in PMU_ACTIVE state */
     pmu_ll_hp_set_icg_modem(&PMU, PMU_MODE_HP_ACTIVE, PMU_HP_ICG_MODEM_CODE_ACTIVE);
 
@@ -53,6 +56,9 @@ static void rtc_clk_modem_clock_domain_active_state_icg_map_preinit(void)
     /* Software trigger force update modem ICG code and ICG switch */
     pmu_ll_imm_update_dig_icg_modem_code(&PMU, true);
     pmu_ll_imm_update_dig_icg_switch(&PMU, true);
+#ifndef ESP_PMU_ENUMS_DECLARED
+#undef PMU_HP_ICG_MODEM_CODE_ACTIVE
+#endif
 }