lp_timer: add hal-layer codes for esp32c6

This commit is contained in:
Li Shuai
2023-01-12 18:04:51 +08:00
committed by wuzhenghui
parent 1eb08db0df
commit c0ddaa5920
10 changed files with 224 additions and 4 deletions

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/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include <stdbool.h>
#include <stddef.h>
#include <stdint.h>
#include "soc/soc.h"
#include "hal/lp_timer_types.h"
#ifdef __cplusplus
extern "C" {
#endif
/*
* @brief set alarm target value
*
* @param timer_id timer num of lp_timer, 0 or 1 for esp32c6
*
* @param value when counter reaches alarm value, alarm event will be triggered
*/
void lp_timer_hal_set_alarm_target(uint8_t timer_id, uint64_t value);
/**
* @brief get current counter value
*
* @param timer_id timer num of lp_timer, 0 or 1 for esp32c6
*/
uint64_t lp_timer_hal_get_cycle_count(uint8_t timer_id);
/**
* @brief clear alarm interrupt status
*/
void lp_timer_hal_clear_alarm_intr_status(void);
/**
* @brief clear overflow interrupt status
*/
void lp_timer_hal_clear_overflow_intr_status(void);
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
// The LL layer for ESP32-C6 LP_Timer register operations
#pragma once
#include <stdlib.h>
#include "soc/soc.h"
#include "soc/rtc.h"
#include "soc/lp_timer_struct.h"
#include "soc/lp_aon_reg.h"
#include "hal/lp_timer_types.h"
#ifdef __cplusplus
extern "C" {
#endif
FORCE_INLINE_ATTR void lp_timer_ll_set_alarm_target(lp_timer_dev_t *dev, uint8_t timer_id, uint64_t value)
{
dev->target[timer_id].hi.target_hi = (value >> 32) & 0xFFFF;
dev->target[timer_id].lo.target_lo = value & 0xFFFFFFFF;
}
FORCE_INLINE_ATTR void lp_timer_ll_set_target_enable(lp_timer_dev_t *dev, uint8_t timer_id, bool en)
{
dev->target[timer_id].hi.enable = en;
}
FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_low(lp_timer_dev_t *dev, uint8_t timer_id)
{
return dev->counter[timer_id].lo.counter_lo;
}
FORCE_INLINE_ATTR uint32_t lp_timer_ll_get_counter_value_high(lp_timer_dev_t *dev, uint8_t timer_id)
{
return dev->counter[timer_id].hi.counter_hi;
}
FORCE_INLINE_ATTR void lp_timer_ll_counter_snapshot(lp_timer_dev_t *dev)
{
dev->update.update = 1;
}
FORCE_INLINE_ATTR void lp_timer_ll_clear_alarm_intr_status(lp_timer_dev_t *dev)
{
dev->int_clr.alarm = 1;
}
FORCE_INLINE_ATTR void lp_timer_ll_clear_overflow_intr_status(lp_timer_dev_t *dev)
{
dev->int_clr.overflow = 1;
}
FORCE_INLINE_ATTR uint64_t lp_timer_ll_time_to_count(uint64_t time_in_us)
{
uint32_t slow_clk_value = REG_READ(LP_AON_STORE1_REG);
return ((time_in_us * (1 << RTC_CLK_CAL_FRACT)) / slow_clk_value);
}
#ifdef __cplusplus
}
#endif

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/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <stdint.h>
#include <stdlib.h>
#include <esp_types.h>
#include "sdkconfig.h"
#include "esp_attr.h"
#include "soc/soc.h"
#include "hal/lp_timer_ll.h"
static DRAM_ATTR struct {
lp_timer_dev_t *dev;
} lp_timer_context = { .dev = &LP_TIMER };
void IRAM_ATTR lp_timer_hal_set_alarm_target(uint8_t timer_id, uint64_t value)
{
lp_timer_ll_clear_alarm_intr_status(lp_timer_context.dev);
lp_timer_ll_set_alarm_target(lp_timer_context.dev, timer_id, value);
lp_timer_ll_set_target_enable(lp_timer_context.dev, timer_id, true);
}
uint64_t IRAM_ATTR lp_timer_hal_get_cycle_count(uint8_t timer_id)
{
lp_timer_ll_counter_snapshot(lp_timer_context.dev);
uint32_t lo = lp_timer_ll_get_counter_value_low(lp_timer_context.dev, timer_id);
uint32_t hi = lp_timer_ll_get_counter_value_high(lp_timer_context.dev, timer_id);
lp_timer_counter_value_t result = {
.lo = lo,
.hi = hi
};
return result.val;
}
void IRAM_ATTR lp_timer_hal_clear_alarm_intr_status(void)
{
lp_timer_ll_clear_alarm_intr_status(lp_timer_context.dev);
}
void IRAM_ATTR lp_timer_hal_clear_overflow_intr_status(void)
{
lp_timer_ll_clear_overflow_intr_status(lp_timer_context.dev);
}