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fix(spi_flash): Fix spi_flash write fail on 26M C2(including OTA fail on this chip)

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This commit is contained in:
Cao Sen Miao
2023-09-06 14:56:27 +08:00
parent 3640dc86bb
commit c147a6d022
23 changed files with 70 additions and 150 deletions
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14
components/hal/esp32/include/hal/spi_flash_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -201,7 +201,7 @@ static inline void spi_flash_ll_program_page(spi_dev_t *dev, const void *buffer,
*
* @param dev Beginning address of the peripheral registers.
*/
static inline void spi_flash_ll_user_start(spi_dev_t *dev)
static inline void spi_flash_ll_user_start(spi_dev_t *dev, bool pe_ops)
{
dev->cmd.usr = 1;
}
@@ -399,16 +399,6 @@ static inline void spi_flash_ll_set_cs_setup(spi_dev_t *dev, uint32_t cs_setup_t
dev->ctrl2.setup_time = cs_setup_time - 1;
}
/**
* @brief Set lock for SPI0 so that spi0 can request new cache request after a cache transfer.
*
* @param dev Beginning address of the peripheral registers.
*/
static inline void spi_flash_ll_set_pe_bit(spi_dev_t *dev)
{
// Not supported on esp32
}
/**
* Get the spi flash source clock frequency. Used for calculating
* the divider parameters.