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fix(spi_flash): Fix spi_flash write fail on 26M C2(including OTA fail on this chip)

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This commit is contained in:
Cao Sen Miao
2023-09-06 14:56:27 +08:00
parent 3640dc86bb
commit c147a6d022
23 changed files with 70 additions and 150 deletions
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19
components/hal/esp32s3/include/hal/spimem_flash_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -368,21 +368,12 @@ static inline void spimem_flash_ll_program_page(spi_mem_dev_t *dev, const void *
* should be configured before this is called.
*
* @param dev Beginning address of the peripheral registers.
* @param pe_ops Is page program/erase operation or not.
*/
static inline void spimem_flash_ll_user_start(spi_mem_dev_t *dev)
static inline void spimem_flash_ll_user_start(spi_mem_dev_t *dev, bool pe_ops)
{
dev->cmd.usr = 1;
}
/**
* In user mode, it is set to indicate that program/erase operation will be triggered.
* This function is combined with `spimem_flash_ll_user_start`. The pe_bit will be cleared automatically once the operation done.
*
* @param dev Beginning address of the peripheral registers.
*/
static inline void spimem_flash_ll_set_pe_bit(spi_mem_dev_t *dev)
{
dev->cmd.flash_pe = 1;
uint32_t usr_pe = (pe_ops ? 0x60000 : 0x40000);
dev->cmd.val |= usr_pe;
}
/**