fix(wdt): changed ESP32-C3 WDT to use XTAL as clock

This clock is unchanged even when CPU/APB frequency changes (e.g. due to esp_pm),
which means timeout period is correct even after such a change.
This commit is contained in:
Marius Vikhammer
2023-09-08 12:23:18 +08:00
parent 111779db5a
commit c192ea478e
11 changed files with 67 additions and 3 deletions

View File

@@ -731,6 +731,10 @@ config SOC_TIMER_GROUP_TOTAL_TIMERS
int
default 2
config SOC_MWDT_SUPPORT_XTAL
bool
default y
config SOC_TWAI_CONTROLLER_NUM
int
default 1

View File

@@ -334,7 +334,7 @@ typedef enum {
typedef enum {
MWDT_CLK_SRC_XTAL = SOC_MOD_CLK_XTAL, /*!< Select XTAL as the source clock */
MWDT_CLK_SRC_APB = SOC_MOD_CLK_APB, /*!< Select APB as the source clock */
MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_APB, /*!< Select APB as the default clock choice */
MWDT_CLK_SRC_DEFAULT = SOC_MOD_CLK_XTAL, /*!< Select APB as the default clock choice */
} soc_periph_mwdt_clk_src_t;
//////////////////////////////////////////////////LEDC/////////////////////////////////////////////////////////////////

View File

@@ -327,6 +327,9 @@
#define SOC_TIMER_GROUP_SUPPORT_APB (1)
#define SOC_TIMER_GROUP_TOTAL_TIMERS (2)
/*--------------------------- WATCHDOG CAPS ---------------------------------------*/
#define SOC_MWDT_SUPPORT_XTAL (1)
/*-------------------------- TWAI CAPS ---------------------------------------*/
#define SOC_TWAI_CONTROLLER_NUM 1UL
#define SOC_TWAI_CLK_SUPPORT_APB 1