Merge branch 'feature/further_support_esp32c2_sleep' into 'master'

esp32c2/sleep: further support sleep for esp32c2 with 26MHz XTAL

Closes IDF-5544

See merge request espressif/esp-idf!19017

components/soc/esp32c2/include/soc/Kconfig.soc_caps.in

@@ -67,6 +67,14 @@ config SOC_SYSTIMER_SUPPORTED
     bool
     default y
 
+config SOC_XTAL_SUPPORT_26M
+    bool
+    default y
+
+config SOC_XTAL_SUPPORT_40M
+    bool
+    default y
+
 config SOC_ADC_DIG_CTRL_SUPPORTED
     bool
     default y

components/soc/esp32c2/include/soc/rtc.h

@@ -174,7 +174,7 @@ typedef struct {
  * Default initializer for rtc_clk_config_t
  */
 #define RTC_CLK_CONFIG_DEFAULT() { \
-    .xtal_freq = RTC_XTAL_FREQ_40M, \
+    .xtal_freq = CONFIG_XTAL_FREQ, \
     .cpu_freq_mhz = 80, \
     .fast_clk_src = SOC_RTC_FAST_CLK_SRC_RC_FAST, \
     .slow_clk_src = SOC_RTC_SLOW_CLK_SRC_RC_SLOW, \

components/soc/esp32c2/include/soc/soc_caps.h

@@ -42,6 +42,10 @@
 #define SOC_SECURE_BOOT_SUPPORTED       1
 #define SOC_SYSTIMER_SUPPORTED          1
 
+/*-------------------------- XTAL CAPS ---------------------------------------*/
+#define SOC_XTAL_SUPPORT_26M            1
+#define SOC_XTAL_SUPPORT_40M            1
+
 /*-------------------------- ADC CAPS -------------------------------*/
 /*!< SAR ADC Module*/
 #define SOC_ADC_DIG_CTRL_SUPPORTED              1