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i2s: fix incorrect sclk in legacy driver
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@@ -654,12 +654,12 @@ static uint32_t i2s_config_source_clock(i2s_port_t i2s_num, bool use_apll, uint3
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/* In APLL mode, there is no sclk but only mclk, so return 0 here to indicate APLL mode */
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return real_freq;
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}
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return esp_clk_apb_freq() * 2;
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return I2S_LL_DEFAULT_PLL_CLK_FREQ;
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#else
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if (use_apll) {
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ESP_LOGW(TAG, "APLL not supported on current chip, use I2S_CLK_SRC_DEFAULT as default clock source");
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}
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return esp_clk_apb_freq() * 2;
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return I2S_LL_DEFAULT_PLL_CLK_FREQ;
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#endif
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}
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