i2s: fix incorrect sclk in legacy driver

This commit is contained in:
laokaiyao
2023-01-11 10:23:57 +08:00
parent 3df87a91a3
commit c25fc7d242
8 changed files with 12 additions and 6 deletions

View File

@@ -654,12 +654,12 @@ static uint32_t i2s_config_source_clock(i2s_port_t i2s_num, bool use_apll, uint3
/* In APLL mode, there is no sclk but only mclk, so return 0 here to indicate APLL mode */
return real_freq;
}
return esp_clk_apb_freq() * 2;
return I2S_LL_DEFAULT_PLL_CLK_FREQ;
#else
if (use_apll) {
ESP_LOGW(TAG, "APLL not supported on current chip, use I2S_CLK_SRC_DEFAULT as default clock source");
}
return esp_clk_apb_freq() * 2;
return I2S_LL_DEFAULT_PLL_CLK_FREQ;
#endif
}