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rename clock enable and reset bits for SPI modules

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1.The names of clock enable and reset bits do not match with TRM, just rename them.
This commit is contained in:
jack
2018-04-24 16:38:46 +08:00
parent d4276efed7
commit c384fa2492
6 changed files with 27 additions and 21 deletions
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2
components/esp32/spiram_psram.c
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@@ -543,7 +543,7 @@ esp_err_t IRAM_ATTR psram_enable(psram_cache_mode_t mode, psram_vaddr_mode_t vad
while (1) {
spi_status = READ_PERI_REG(SPI_EXT2_REG(PSRAM_SPI_3));
if (spi_status != 0 && spi_status != 1) {
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI_CLK_EN_2);
DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_SPI3_CLK_EN);
break;
}
}