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https://github.com/espressif/esp-idf.git
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uart: support light sleep on esp32s3
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@@ -659,6 +659,26 @@ config SOC_TOUCH_PAD_MEASURE_WAIT_MAX
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hex
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default 0xFF
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config SOC_UART_NUM
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int
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default 3
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config SOC_UART_FIFO_LEN
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int
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default 128
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config SOC_UART_BITRATE_MAX
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int
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default 5000000
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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config SOC_UART_SUPPORT_WAKEUP_INT
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bool
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default y
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config SOC_UART_SUPPORT_RTC_CLK
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bool
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default y
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@@ -838,19 +858,3 @@ config SOC_TWAI_BRP_MAX
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config SOC_TWAI_SUPPORTS_RX_STATUS
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bool
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default y
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config SOC_UART_FIFO_LEN
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int
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default 128
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config SOC_UART_BITRATE_MAX
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int
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default 5000000
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config SOC_UART_NUM
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int
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default 3
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config SOC_UART_SUPPORT_FSM_TX_WAIT_SEND
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bool
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default y
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@@ -252,8 +252,13 @@
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#include "twai_caps.h"
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/*-------------------------- UART CAPS ---------------------------------------*/
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#include "uart_caps.h"
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// ESP32-S3 has 3 UARTs
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#define SOC_UART_NUM (3)
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#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */
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#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#define SOC_UART_SUPPORT_WAKEUP_INT (1) /*!< Support UART wakeup interrupt */
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#define SOC_UART_SUPPORT_RTC_CLK (1) /*!< Support RTC clock as the clock source */
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#define SOC_UART_SUPPORT_XTAL_CLK (1) /*!< Support XTAL clock as the clock source */
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@@ -1,31 +0,0 @@
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// Copyright 2010-2020 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define SOC_UART_FIFO_LEN (128) /*!< The UART hardware FIFO length */
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#define SOC_UART_BITRATE_MAX (5000000) /*!< Max bit rate supported by UART */
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#define SOC_UART_NUM (3)
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// UART has an extra TX_WAIT_SEND state when the FIFO is not empty and XOFF is enabled
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#define SOC_UART_SUPPORT_FSM_TX_WAIT_SEND (1)
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#ifdef __cplusplus
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}
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#endif
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