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remove(c5beta3): remove c5 beta3 doxy files

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This commit is contained in:
laokaiyao
2024-06-11 15:31:33 +08:00
parent 21f870ecd5
commit c731b099ee
89 changed files with 153 additions and 309 deletions
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13
components/hal/esp32c5/clk_tree_hal.c
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@@ -12,10 +12,6 @@
#include "hal/log.h"
#include "sdkconfig.h"
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
static const char *CLK_HAL_TAG = "clk_hal";
#endif
uint32_t clk_hal_soc_root_get_freq_mhz(soc_cpu_clk_src_t cpu_clk_src)
{
switch (cpu_clk_src) {
@@ -73,18 +69,9 @@ uint32_t clk_hal_lp_slow_get_freq_hz(void)
uint32_t clk_hal_xtal_get_freq_mhz(void)
{
#if CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
uint32_t freq = clk_ll_xtal_load_freq_mhz();
if (freq == 0) {
HAL_LOGW(CLK_HAL_TAG, "invalid RTC_XTAL_FREQ_REG value, assume 48MHz");
return (uint32_t)SOC_XTAL_FREQ_48M;
}
return freq;
#elif CONFIG_IDF_TARGET_ESP32C5_MP_VERSION
uint32_t freq = clk_ll_xtal_get_freq_mhz();
HAL_ASSERT(freq == SOC_XTAL_FREQ_48M || freq == SOC_XTAL_FREQ_40M);
return freq;
#endif
}
void clk_hal_clock_output_setup(soc_clkout_sig_id_t clk_sig, clock_out_channel_t channel_id)

2
components/hal/esp32c5/include/hal/clk_tree_ll.h
View File

@@ -265,7 +265,6 @@ static inline __attribute__((always_inline)) bool clk_ll_rc32k_digi_is_enabled(v
return LP_CLKRST.clk_to_hp.icg_hp_osc32k;
}
#if !CONFIG_IDF_TARGET_ESP32C5_BETA3_VERSION
/**
* @brief Get XTAL_CLK frequency
*
@@ -277,7 +276,6 @@ static inline __attribute__((always_inline)) uint32_t clk_ll_xtal_get_freq_mhz(v
{
return PCR.sysclk_conf.clk_xtal_freq;
}
#endif
/**
* @brief Get PLL_CLK frequency