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Merge branch 'bugfix/rtc_clk_cpu_freq_set_xtal_behavior_v5.1' into 'release/v5.1'

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fix(clk): rtc_clk_cpu_freq_set_xtal will always disable CPU's PLL (v5.1)

See merge request espressif/esp-idf!35946
This commit is contained in:
morris
2024-12-26 10:48:58 +08:00
parent 20b0a71a66 6a26acf647
commit c7ad441eab
5 changed files with 17 additions and 25 deletions
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7
components/soc/esp32h2/include/soc/rtc.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2020-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -382,8 +382,9 @@ void rtc_clk_cpu_freq_get_config(rtc_cpu_freq_config_t *out_config);
* rtc_clk_cpu_freq_set_config when a switch to XTAL is needed.
* Assumes that XTAL frequency has been determined — don't call in startup code.
*
* @note On ESP32H2, this function will check whether BBPLL can be disabled. If there is no consumer, then BBPLL will be
* turned off. The behaviour is the same as using rtc_clk_cpu_freq_set_config to switch cpu clock source to XTAL.
* @note This function always disables BBPLL after switching the CPU clock source to XTAL for power saving purpose.
* If this is unwanted, please use rtc_clk_cpu_freq_set_config. It helps to check whether USB Serial JTAG is in use,
* if so, then BBPLL will not be turned off.
*/
void rtc_clk_cpu_freq_set_xtal(void);