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change(esp_hw_support): switch to sleep_flags earlier to identify sleep state
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@@ -46,11 +46,11 @@ typedef enum {
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#define RTC_SLEEP_PD_MODEM PMU_SLEEP_PD_MODEM //!< Power down modem(include wifi, ble and 15.4)
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//These flags are not power domains, but will affect some sleep parameters
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#define RTC_SLEEP_DIG_USE_8M BIT(16)
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#define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17)
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#define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature
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#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(19)
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#define RTC_SLEEP_LP_PERIPH_USE_XTAL BIT(20)
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#define RTC_SLEEP_DIG_USE_8M BIT(27)
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#define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(28)
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#define RTC_SLEEP_NO_ULTRA_LOW BIT(29) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature
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#define RTC_SLEEP_XTAL_AS_RTC_FAST BIT(30)
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#define RTC_SLEEP_LP_PERIPH_USE_XTAL BIT(31)
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#if SOC_PM_SUPPORT_EXT0_WAKEUP
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#define RTC_EXT0_TRIG_EN PMU_EXT0_WAKEUP_EN //!< EXT0 wakeup
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@@ -205,40 +205,40 @@ bool pmu_sleep_pll_already_enabled(void);
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/**
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* @brief Calculate the LP system hardware time overhead during sleep
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*
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* @param pd_flags flags indicates the power domain that will be powered down
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* @param sleep_flags flags indicates the power domain that will be powered down and the sleep submode
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* @param slowclk_period re-calibrated slow clock period
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* @param fastclk_period re-calibrated fast clock period
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*
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* @return hardware time overhead in us
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*/
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uint32_t pmu_sleep_calculate_lp_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_period, uint32_t fastclk_period);
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uint32_t pmu_sleep_calculate_lp_hw_wait_time(uint32_t sleep_flags, uint32_t slowclk_period, uint32_t fastclk_period);
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/**
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* @brief Calculate the HP system hardware time overhead during sleep
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*
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* @param pd_flags flags indicates the power domain that will be powered down
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* @param sleep_flags flags indicates the power domain that will be powered down and the sleep submode
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* @param slowclk_period re-calibrated slow clock period
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* @param fastclk_period re-calibrated fast clock period
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*
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* @return hardware time overhead in us
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*/
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uint32_t pmu_sleep_calculate_hp_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_period, uint32_t fastclk_period);
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uint32_t pmu_sleep_calculate_hp_hw_wait_time(uint32_t sleep_flags, uint32_t slowclk_period, uint32_t fastclk_period);
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/**
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* @brief Calculate the hardware time overhead during sleep to compensate for sleep time
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*
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* @param pd_flags flags indicates the power domain that will be powered down
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* @param sleep_flags flags indicates the power domain that will be powered down and the sleep submode
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* @param slowclk_period re-calibrated slow clock period
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* @param fastclk_period re-calibrated fast clock period
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*
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* @return hardware time overhead in us
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*/
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uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_period, uint32_t fastclk_period);
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uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t sleep_flags, uint32_t slowclk_period, uint32_t fastclk_period);
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/**
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* @brief Get default sleep configuration
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* @param config pmu_sleep_config instance
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* @param pd_flags flags indicates the power domain that will be powered down
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* @param sleep_flags flags indicates the power domain that will be powered down and the sleep submode
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* @param adjustment total software and hardware time overhead
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* @param slowclk_period re-calibrated slow clock period in microseconds,
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* Q13.19 fixed point format
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@@ -248,7 +248,7 @@ uint32_t pmu_sleep_calculate_hw_wait_time(uint32_t pd_flags, uint32_t slowclk_pe
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* @return hardware time overhead in us
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*/
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const pmu_sleep_config_t* pmu_sleep_config_default(pmu_sleep_config_t *config, uint32_t pd_flags, uint32_t adjustment, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp);
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const pmu_sleep_config_t* pmu_sleep_config_default(pmu_sleep_config_t *config, uint32_t sleep_flags, uint32_t adjustment, uint32_t slowclk_period, uint32_t fastclk_period, bool dslp);
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/**
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* @brief Prepare the chip to enter sleep mode
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