fix(esp_hw_support): fix current leakage if ext32k slow clock source not exists

This commit is contained in:
wuzhenghui
2025-03-31 14:58:00 +08:00
parent 6b4f08c1dc
commit c84757d35e
33 changed files with 216 additions and 48 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -276,7 +276,12 @@ void rtc_clk_32k_enable(bool en);
void rtc_clk_32k_enable_external(void);
/**
* @brief Get the state of 32k XTAL oscillator
* @brief Disable 32 kHz XTAL oscillator input.
*/
void rtc_clk_32k_disable_external(void);
/**
* @brief Get the state of 32k XTAL oscillators
* @return true if 32k XTAL oscillator has been enabled
*/
bool rtc_clk_32k_enabled(void);

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2015-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -72,6 +72,13 @@ void rtc_clk_32k_enable_external(void)
clk_ll_xtal32k_enable(CLK_LL_XTAL32K_ENABLE_MODE_EXTERNAL);
}
void rtc_clk_32k_disable_external(void)
{
PIN_INPUT_DISABLE(IO_MUX_GPIO15_REG);
CLEAR_PERI_REG_MASK(RTC_CNTL_PAD_HOLD_REG, RTC_CNTL_X32P_HOLD);
clk_ll_xtal32k_disable();
}
void rtc_clk_32k_bootstrap(uint32_t cycle)
{
/* No special bootstrapping needed for ESP32-S3, 'cycle' argument is to keep the signature