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https://github.com/espressif/esp-idf.git
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Merge branch 'support/add_uart_fifo_threshold_set_api' into 'master'
add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty See merge request espressif/esp-idf!6749
This commit is contained in:
@@ -700,6 +700,34 @@ esp_err_t uart_pattern_queue_reset(uart_port_t uart_num, int queue_length);
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*/
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esp_err_t uart_set_mode(uart_port_t uart_num, uart_mode_t mode);
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/**
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* @brief Set uart threshold value for RX fifo full
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* @note If application is using higher baudrate and it is observed that bytes
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* in hardware RX fifo are overwritten then this threshold can be reduced
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*
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* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
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* @param threshold Threshold value above which RX fifo full interrupt is generated
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_ERR_INVALID_STATE Driver is not installed
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*/
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esp_err_t uart_set_rx_full_threshold(uart_port_t uart_num, int threshold);
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/**
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* @brief Set uart threshold values for TX fifo empty
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*
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* @param uart_num UART_NUM_0, UART_NUM_1 or UART_NUM_2
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* @param threshold Threshold value below which TX fifo empty interrupt is generated
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*
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* @return
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* - ESP_OK Success
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* - ESP_ERR_INVALID_ARG Parameter error
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* - ESP_ERR_INVALID_STATE Driver is not installed
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*/
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esp_err_t uart_set_tx_empty_threshold(uart_port_t uart_num, int threshold);
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/**
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* @brief UART set threshold timeout for TOUT feature
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*
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@@ -60,6 +60,12 @@ static const char* UART_TAG = "uart";
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#define UART_PATTERN_DET_QLEN_DEFAULT (10)
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#define UART_MIN_WAKEUP_THRESH (SOC_UART_MIN_WAKEUP_THRESH)
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#define UART_INTR_CONFIG_FLAG ((UART_INTR_RXFIFO_FULL) \
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| (UART_INTR_RXFIFO_TOUT) \
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| (UART_INTR_RXFIFO_OVF) \
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| (UART_INTR_BRK_DET) \
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| (UART_INTR_PARITY_ERR))
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#define UART_ENTER_CRITICAL_ISR(mux) portENTER_CRITICAL_ISR(mux)
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#define UART_EXIT_CRITICAL_ISR(mux) portEXIT_CRITICAL_ISR(mux)
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#define UART_ENTER_CRITICAL(mux) portENTER_CRITICAL(mux)
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@@ -1330,12 +1336,7 @@ esp_err_t uart_driver_install(uart_port_t uart_num, int rx_buffer_size, int tx_b
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}
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uart_intr_config_t uart_intr = {
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.intr_enable_mask = UART_INTR_RXFIFO_FULL
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| UART_INTR_RXFIFO_TOUT
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| UART_INTR_PARITY_ERR
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| UART_INTR_RXFIFO_OVF
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| UART_INTR_BRK_DET
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| UART_INTR_PARITY_ERR,
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.intr_enable_mask = UART_INTR_CONFIG_FLAG,
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.rxfifo_full_thresh = UART_FULL_THRESH_DEFAULT,
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.rx_timeout_thresh = UART_TOUT_THRESH_DEFAULT,
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.txfifo_empty_intr_thresh = UART_EMPTY_THRESH_DEFAULT
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@@ -1448,6 +1449,40 @@ esp_err_t uart_set_mode(uart_port_t uart_num, uart_mode_t mode)
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return ESP_OK;
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}
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esp_err_t uart_set_rx_full_threshold(uart_port_t uart_num, int threshold)
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{
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UART_CHECK((uart_num < UART_NUM_MAX), "uart_num error", ESP_ERR_INVALID_ARG);
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UART_CHECK((threshold < UART_RXFIFO_FULL_THRHD_V) && (threshold > 0),
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"rx fifo full threshold value error", ESP_ERR_INVALID_ARG);
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if (p_uart_obj[uart_num] == NULL) {
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ESP_LOGE(UART_TAG, "call uart_driver_install API first");
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return ESP_ERR_INVALID_STATE;
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}
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UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
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if (uart_hal_get_intr_ena_status(&(uart_context[uart_num].hal)) & UART_INTR_RXFIFO_FULL) {
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uart_hal_set_rxfifo_full_thr(&(uart_context[uart_num].hal), threshold);
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}
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UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
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return ESP_OK;
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}
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esp_err_t uart_set_tx_empty_threshold(uart_port_t uart_num, int threshold)
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{
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UART_CHECK((uart_num < UART_NUM_MAX), "uart_num error", ESP_ERR_INVALID_ARG);
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UART_CHECK((threshold < UART_TXFIFO_EMPTY_THRHD_V) && (threshold > 0),
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"tx fifo empty threshold value error", ESP_ERR_INVALID_ARG);
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if (p_uart_obj[uart_num] == NULL) {
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ESP_LOGE(UART_TAG, "call uart_driver_install API first");
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return ESP_ERR_INVALID_STATE;
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}
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UART_ENTER_CRITICAL(&(uart_context[uart_num].spinlock));
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if (uart_hal_get_intr_ena_status(&(uart_context[uart_num].hal)) & UART_INTR_TXFIFO_EMPTY) {
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uart_hal_set_txfifo_empty_thr(&(uart_context[uart_num].hal), threshold);
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}
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UART_EXIT_CRITICAL(&(uart_context[uart_num].spinlock));
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return ESP_OK;
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}
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esp_err_t uart_set_rx_timeout(uart_port_t uart_num, const uint8_t tout_thresh)
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{
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UART_CHECK((uart_num < UART_NUM_MAX), "uart_num error", ESP_ERR_INVALID_ARG);
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