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esp32h2: support GPIO peripheral, IO_MUX, GPIO matrix.
Generic GPIO example is supported as well.
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@@ -144,6 +144,9 @@ static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_f
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int spics_out = spi_periph_signal[config->host_id].spics_out[cs_id];
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int spics_func = spi_periph_signal[config->host_id].func;
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uint32_t iomux_reg = GPIO_PIN_MUX_REG[cs_io_num];
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gpio_hal_context_t gpio_hal = {
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.dev = GPIO_HAL_GET_HW(GPIO_PORT_0)
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};
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//To avoid the panic caused by flash data line conflicts during cs line
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//initialization, disable the cache temporarily
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@@ -152,16 +155,8 @@ static IRAM_ATTR NOINLINE_ATTR void cs_initialize(esp_flash_t *chip, const esp_f
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if (use_iomux) {
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gpio_hal_iomux_func_sel(iomux_reg, spics_func);
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} else {
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#if SOC_GPIO_PIN_COUNT <= 32
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GPIO.enable_w1ts.val = (0x1 << cs_io_num);
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#else
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if (cs_io_num < 32) {
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GPIO.enable_w1ts = (0x1 << cs_io_num);
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} else {
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GPIO.enable1_w1ts.data = (0x1 << (cs_io_num - 32));
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}
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#endif
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GPIO.pin[cs_io_num].pad_driver = 0;
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gpio_hal_output_enable(&gpio_hal, cs_io_num);
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gpio_hal_od_disable(&gpio_hal, cs_io_num);
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esp_rom_gpio_connect_out_signal(cs_io_num, spics_out, false, false);
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if (cs_id == 0) {
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esp_rom_gpio_connect_in_signal(cs_io_num, spics_in, false);
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