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feat(gpio): reserve gpio output atomically
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@@ -1,13 +1,13 @@
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/*
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Driver bits for PSRAM chips (at the moment only the ESP-PSRAM32 chip).
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*/
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/*
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* SPDX-FileCopyrightText: 2013-2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2013-2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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Driver bits for PSRAM chips (at the moment only the ESP-PSRAM32 chip).
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*/
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#include "sdkconfig.h"
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#include "string.h"
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#include "esp_attr.h"
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@@ -383,14 +383,14 @@ static void IRAM_ATTR psram_gpio_config(psram_cache_speed_t mode)
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s_psram_cs_io = psram_io.psram_cs_io;
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// Preserve psram pins
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esp_gpio_reserve_pins(BIT64(psram_io.flash_clk_io) |
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BIT64(psram_io.flash_cs_io) |
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BIT64(psram_io.psram_clk_io) |
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BIT64(psram_io.psram_cs_io) |
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BIT64(psram_io.psram_spiq_sd0_io) |
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BIT64(psram_io.psram_spid_sd1_io) |
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BIT64(psram_io.psram_spihd_sd2_io) |
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BIT64(psram_io.psram_spiwp_sd3_io));
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esp_gpio_reserve(BIT64(psram_io.flash_clk_io) |
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BIT64(psram_io.flash_cs_io) |
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BIT64(psram_io.psram_clk_io) |
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BIT64(psram_io.psram_cs_io) |
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BIT64(psram_io.psram_spiq_sd0_io) |
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BIT64(psram_io.psram_spid_sd1_io) |
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BIT64(psram_io.psram_spihd_sd2_io) |
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BIT64(psram_io.psram_spiwp_sd3_io));
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}
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//used in UT only
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