alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-08-09 12:35:28 +00:00
Code Issues Packages Projects Releases Wiki Activity

soc: create abstraction for cpu related operations

Browse Source
This commit is contained in:
Renz Christian Bagaporo
2020-01-19 10:02:21 +08:00
parent ac55328efd
commit c9a51bfbb2
34 changed files with 1263 additions and 117 deletions
Download Patch File Download Diff File Expand all files Collapse all files

53
components/esp32s2/panic.c
View File

@@ -672,59 +672,6 @@ void esp_set_breakpoint_if_jtag(void *fn)
}
}
esp_err_t esp_set_watchpoint(int no, void *adr, int size, int flags)
{
int x;
if (no < 0 || no > 1) {
return ESP_ERR_INVALID_ARG;
}
if (flags & (~0xC0000000)) {
return ESP_ERR_INVALID_ARG;
}
int dbreakc = 0x3F;
//We support watching 2^n byte values, from 1 to 64. Calculate the mask for that.
for (x = 0; x < 7; x++) {
if (size == (1 << x)) {
break;
}
dbreakc <<= 1;
}
if (x == 7) {
return ESP_ERR_INVALID_ARG;
}
//Mask mask and add in flags.
dbreakc = (dbreakc & 0x3f) | flags;
if (no == 0) {
asm volatile(
"wsr.dbreaka0 %0\n" \
"wsr.dbreakc0 %1\n" \
::"r"(adr), "r"(dbreakc));
} else {
asm volatile(
"wsr.dbreaka1 %0\n" \
"wsr.dbreakc1 %1\n" \
::"r"(adr), "r"(dbreakc));
}
return ESP_OK;
}
void esp_clear_watchpoint(int no)
{
//Setting a dbreakc register to 0 makes it trigger on neither load nor store, effectively disabling it.
int dbreakc = 0;
if (no == 0) {
asm volatile(
"wsr.dbreakc0 %0\n" \
::"r"(dbreakc));
} else {
asm volatile(
"wsr.dbreakc1 %0\n" \
::"r"(dbreakc));
}
}
void _esp_error_check_failed(esp_err_t rc, const char *file, int line, const char *function, const char *expression)
{
ets_printf("ESP_ERROR_CHECK failed: esp_err_t 0x%x", rc);