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feat(esp_timer): Support systimer for ESP32P4
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@@ -10,6 +10,7 @@
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#include "soc/systimer_struct.h"
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#include "soc/clk_tree_defs.h"
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#include "hal/assert.h"
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#include "soc/hp_sys_clkrst_struct.h"
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#ifdef __cplusplus
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extern "C" {
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@@ -18,8 +19,6 @@ extern "C" {
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// All these functions get invoked either from ISR or HAL that linked to IRAM.
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// Always inline these functions even no gcc optimization is applied.
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//TODO: IDF-7486
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/******************* Clock *************************/
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__attribute__((always_inline)) static inline void systimer_ll_enable_clock(systimer_dev_t *dev, bool en)
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@@ -30,17 +29,24 @@ __attribute__((always_inline)) static inline void systimer_ll_enable_clock(systi
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// Set clock source: XTAL(default) or RC_FAST
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static inline void systimer_ll_set_clock_source(soc_periph_systimer_clk_src_t clk_src)
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{
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HP_SYS_CLKRST.peri_clk_ctrl21.reg_systimer_clk_src_sel = (clk_src == SYSTIMER_CLK_SRC_RC_FAST) ? 1 : 0;
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}
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/// use a macro to wrap the function, force the caller to use it in a critical section
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/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance
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#define systimer_ll_set_clock_source(...) (void)__DECLARE_RCC_ATOMIC_ENV; systimer_ll_set_clock_source(__VA_ARGS__)
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static inline soc_periph_systimer_clk_src_t systimer_ll_get_clock_source(void)
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{
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return SYSTIMER_CLK_SRC_XTAL;
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return (HP_SYS_CLKRST.peri_clk_ctrl21.reg_systimer_clk_src_sel == 1) ? SYSTIMER_CLK_SRC_RC_FAST : SYSTIMER_CLK_SRC_XTAL;
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}
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/********************** ETM *****************************/
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__attribute__((always_inline)) static inline void systimer_ll_enable_etm(systimer_dev_t *dev, bool en)
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{
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dev->conf.etm_en = en;
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}
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/******************* Counter *************************/
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