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feat(efuse): Adds new efuses for esp32c6

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KonstantinKondrashov
2023-12-05 17:34:20 +08:00
committed by Xiao Xufeng
parent f7a920685a
commit cce3c4a1d5
5 changed files with 240 additions and 20 deletions
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64
components/soc/esp32c6/include/soc/efuse_reg.h
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -650,20 +650,62 @@ extern "C" {
* BLOCK1 data register $n.
*/
#define EFUSE_RD_MAC_SPI_SYS_2_REG (DR_REG_EFUSE_BASE + 0x4c)
/** EFUSE_MAC_SPI_RESERVED : RO; bitpos: [13:0]; default: 0;
* Reserved.
/** EFUSE_ACTIVE_HP_DBIAS : RO; bitpos: [4:0]; default: 0;
* Stores the active hp dbias.
*/
#define EFUSE_MAC_SPI_RESERVED 0x00003FFFU
#define EFUSE_MAC_SPI_RESERVED_M (EFUSE_MAC_SPI_RESERVED_V << EFUSE_MAC_SPI_RESERVED_S)
#define EFUSE_MAC_SPI_RESERVED_V 0x00003FFFU
#define EFUSE_MAC_SPI_RESERVED_S 0
/** EFUSE_SPI_PAD_CONF_1 : RO; bitpos: [31:14]; default: 0;
#define EFUSE_ACTIVE_HP_DBIAS 0x0000001FU
#define EFUSE_ACTIVE_HP_DBIAS_M (EFUSE_ACTIVE_HP_DBIAS_V << EFUSE_ACTIVE_HP_DBIAS_S)
#define EFUSE_ACTIVE_HP_DBIAS_V 0x0000001FU
#define EFUSE_ACTIVE_HP_DBIAS_S 0
/** EFUSE_ACTIVE_LP_DBIAS : RO; bitpos: [9:5]; default: 0;
* Stores the active lp dbias.
*/
#define EFUSE_ACTIVE_LP_DBIAS 0x0000001FU
#define EFUSE_ACTIVE_LP_DBIAS_M (EFUSE_ACTIVE_LP_DBIAS_V << EFUSE_ACTIVE_LP_DBIAS_S)
#define EFUSE_ACTIVE_LP_DBIAS_V 0x0000001FU
#define EFUSE_ACTIVE_LP_DBIAS_S 5
/** EFUSE_LSLP_HP_DBG : RO; bitpos: [11:10]; default: 0;
* Stores the lslp hp dbg.
*/
#define EFUSE_LSLP_HP_DBG 0x00000003U
#define EFUSE_LSLP_HP_DBG_M (EFUSE_LSLP_HP_DBG_V << EFUSE_LSLP_HP_DBG_S)
#define EFUSE_LSLP_HP_DBG_V 0x00000003U
#define EFUSE_LSLP_HP_DBG_S 10
/** EFUSE_LSLP_HP_DBIAS : RO; bitpos: [15:12]; default: 0;
* Stores the lslp hp dbias.
*/
#define EFUSE_LSLP_HP_DBIAS 0x0000000FU
#define EFUSE_LSLP_HP_DBIAS_M (EFUSE_LSLP_HP_DBIAS_V << EFUSE_LSLP_HP_DBIAS_S)
#define EFUSE_LSLP_HP_DBIAS_V 0x0000000FU
#define EFUSE_LSLP_HP_DBIAS_S 12
/** EFUSE_DSLP_LP_DBG : RO; bitpos: [18:16]; default: 0;
* Stores the dslp lp dbg.
*/
#define EFUSE_DSLP_LP_DBG 0x00000007U
#define EFUSE_DSLP_LP_DBG_M (EFUSE_DSLP_LP_DBG_V << EFUSE_DSLP_LP_DBG_S)
#define EFUSE_DSLP_LP_DBG_V 0x00000007U
#define EFUSE_DSLP_LP_DBG_S 16
/** EFUSE_DSLP_LP_DBIAS : RO; bitpos: [22:19]; default: 0;
* Stores the dslp lp dbias.
*/
#define EFUSE_DSLP_LP_DBIAS 0x0000000FU
#define EFUSE_DSLP_LP_DBIAS_M (EFUSE_DSLP_LP_DBIAS_V << EFUSE_DSLP_LP_DBIAS_S)
#define EFUSE_DSLP_LP_DBIAS_V 0x0000000FU
#define EFUSE_DSLP_LP_DBIAS_S 19
/** EFUSE_DBIAS_VOL_GAP : RO; bitpos: [27:23]; default: 0;
* Stores the hp and lp dbias vol gap.
*/
#define EFUSE_DBIAS_VOL_GAP 0x0000001FU
#define EFUSE_DBIAS_VOL_GAP_M (EFUSE_DBIAS_VOL_GAP_V << EFUSE_DBIAS_VOL_GAP_S)
#define EFUSE_DBIAS_VOL_GAP_V 0x0000001FU
#define EFUSE_DBIAS_VOL_GAP_S 23
/** EFUSE_SPI_PAD_CONF_1 : RO; bitpos: [31:28]; default: 0;
* Stores the first part of SPI_PAD_CONF.
*/
#define EFUSE_SPI_PAD_CONF_1 0x0003FFFFU
#define EFUSE_SPI_PAD_CONF_1 0x0000000FU
#define EFUSE_SPI_PAD_CONF_1_M (EFUSE_SPI_PAD_CONF_1_V << EFUSE_SPI_PAD_CONF_1_S)
#define EFUSE_SPI_PAD_CONF_1_V 0x0003FFFFU
#define EFUSE_SPI_PAD_CONF_1_S 14
#define EFUSE_SPI_PAD_CONF_1_V 0x0000000FU
#define EFUSE_SPI_PAD_CONF_1_S 28
/** EFUSE_RD_MAC_SPI_SYS_3_REG register
* BLOCK1 data register $n.

36
components/soc/esp32c6/include/soc/efuse_struct.h
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@@ -1,5 +1,5 @@
/**
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -509,14 +509,38 @@ typedef union {
*/
typedef union {
struct {
/** mac_spi_reserved : RO; bitpos: [13:0]; default: 0;
* Reserved.
/** active_hp_dbias : RO; bitpos: [4:0]; default: 0;
* Stores the active hp dbias.
*/
uint32_t mac_spi_reserved:14;
/** spi_pad_conf_1 : RO; bitpos: [31:14]; default: 0;
uint32_t active_hp_dbias:5;
/** active_lp_dbias : RO; bitpos: [9:5]; default: 0;
* Stores the active lp dbias.
*/
uint32_t active_lp_dbias:5;
/** lslp_hp_dbg : RO; bitpos: [11:10]; default: 0;
* Stores the lslp hp dbg.
*/
uint32_t lslp_hp_dbg:2;
/** lslp_hp_dbias : RO; bitpos: [15:12]; default: 0;
* Stores the lslp hp dbias.
*/
uint32_t lslp_hp_dbias:4;
/** dslp_lp_dbg : RO; bitpos: [18:16]; default: 0;
* Stores the dslp lp dbg.
*/
uint32_t dslp_lp_dbg:3;
/** dslp_lp_dbias : RO; bitpos: [22:19]; default: 0;
* Stores the dslp lp dbias.
*/
uint32_t dslp_lp_dbias:4;
/** dbias_vol_gap : RO; bitpos: [27:23]; default: 0;
* Stores the hp and lp dbias vol gap.
*/
uint32_t dbias_vol_gap:5;
/** spi_pad_conf_1 : RO; bitpos: [31:28]; default: 0;
* Stores the first part of SPI_PAD_CONF.
*/
uint32_t spi_pad_conf_1:18;
uint32_t spi_pad_conf_1:4;
};
uint32_t val;
} efuse_rd_mac_spi_sys_2_reg_t;