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freertos/xt_asm_utils: added documentation of current windows spill solution

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This commit is contained in:
Felipe Neves
2019-10-14 11:57:36 -03:00
parent 768d115e85
commit cd11787153
2 changed files with 34 additions and 10 deletions
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26
components/freertos/xt_asm_utils.h
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@@ -1,3 +1,28 @@
/* Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
/* File adapted to use on IDF FreeRTOS component, extracted
* originally from zephyr RTOS code base
*/
/*
* Copyright (c) 2017, Intel Corporation
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef __XT_ASM_UTILS_H #ifndef __XT_ASM_UTILS_H
#define __XT_ASM_UTILS_H #define __XT_ASM_UTILS_H
@@ -59,5 +84,4 @@
#endif #endif
.endm .endm
#endif #endif

18
components/freertos/xtensa_context.S
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@@ -169,25 +169,25 @@ _xt_context_save:
s32i a9, sp, XT_STK_OVLY /* save overlay state */ s32i a9, sp, XT_STK_OVLY /* save overlay state */
#endif #endif
rsr a2, PS rsr a2, PS /* We need to enable window execptions to */
movi a3, PS_INTLEVEL_MASK movi a3, PS_INTLEVEL_MASK /* perform spill registers*/
and a2, a2, a3 and a2, a2, a3
bnez a2, _not_l1 bnez a2, _not_l1
rsr a2, PS rsr a2, PS
movi a3, PS_INTLEVEL(1) movi a3, PS_INTLEVEL(1) /* For some curious reason the level 1 interrupts */
or a2, a2, a3 or a2, a2, a3 /* dont set the intlevel correctly on PS, we need to */
wsr a2, PS wsr a2, PS /* do this manually */
_not_l1: _not_l1:
rsr a2, PS rsr a2, PS /* finally umask the window exceptions */
movi a3, ~(PS_EXCM_MASK) movi a3, ~(PS_EXCM_MASK)
and a2, a2, a3 and a2, a2, a3
wsr a2, PS wsr a2, PS
rsync rsync
addi sp, sp, XT_STK_FRMSZ /* restore the interruptee's SP */ addi sp, sp, XT_STK_FRMSZ /* go back to spill register region */
SPILL_ALL_WINDOWS SPILL_ALL_WINDOWS /* place the live register windows there */
addi sp, sp, -XT_STK_FRMSZ addi sp, sp, -XT_STK_FRMSZ /* return the current stack pointer and proceed with conext save*/
#endif #endif
l32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */ l32i a12, sp, XT_STK_TMP0 /* temp. save stuff in stack frame */