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esp_adc: add test with -O0

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This commit is contained in:
morris
2022-08-02 17:53:32 +08:00
parent a5a171926b
commit cf4cfc69ed
9 changed files with 42 additions and 3 deletions
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5
components/hal/esp32s2/include/hal/spi_ll.h
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@@ -969,6 +969,7 @@ static inline uint32_t spi_ll_slave_get_rcv_bitlen(spi_dev_t *hw)
item(SPI_LL_INTR_CMDA, dma_int_ena.cmda, dma_int_raw.cmda, dma_int_clr.cmda=1)
__attribute__((always_inline))
static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
{
#define ENA_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 1;
@@ -976,6 +977,7 @@ static inline void spi_ll_enable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
#undef ENA_INTR
}
__attribute__((always_inline))
static inline void spi_ll_disable_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
{
#define DIS_INTR(intr_bit, en_reg, ...) if (intr_mask & (intr_bit)) hw->en_reg = 0;
@@ -990,6 +992,7 @@ static inline void spi_ll_set_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
#undef SET_INTR
}
__attribute__((always_inline))
static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
{
#define CLR_INTR(intr_bit, _, __, clr_reg) if (intr_mask & (intr_bit)) hw->clr_reg;
@@ -997,6 +1000,7 @@ static inline void spi_ll_clear_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
#undef CLR_INTR
}
__attribute__((always_inline))
static inline bool spi_ll_get_intr(spi_dev_t *hw, spi_ll_intr_t intr_mask)
{
#define GET_INTR(intr_bit, _, st_reg, ...) if (intr_mask & (intr_bit) && hw->st_reg) return true;
@@ -1142,6 +1146,7 @@ static inline void spi_dma_ll_rx_enable_burst_desc(spi_dma_dev_t *dma_in, uint32
* @param channel DMA channel, for chip version compatibility, not used.
* @return The address
*/
__attribute__((always_inline))
static inline uint32_t spi_dma_ll_get_in_suc_eof_desc_addr(spi_dma_dev_t *dma_in, uint32_t channel)
{
return dma_in->dma_in_suc_eof_des_addr;