Merge branch 'master' into feature/bignum_rsa

2025-08-09 04:25:32 +00:00 · 2016-11-15 16:39:29 +08:00
parent ce7b8059de a40e0936e5
commit cf8c9770a0
440 changed files with 66510 additions and 8748 deletions
--- a/components/esp32/Kconfig
+++ b/components/esp32/Kconfig
@@ -63,14 +63,28 @@ config MEMMAP_TRACEMEM
        of memory that can't be used for general purposes anymore. Disable this if you do not know
        what this is.

+config MEMMAP_TRACEMEM_TWOBANKS
+    bool "Reserve memory for tracing both pro as well as app cpu execution"
+    default "n"
+    depends on MEMMAP_TRACEMEM && MEMMAP_SMP
+    help
+        The ESP32 contains a feature which allows you to trace the execution path the processor
+        has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
+        of memory that can't be used for general purposes anymore. Disable this if you do not know
+        what this is.
+
+
 # Memory to reverse for trace, used in linker script
 config TRACEMEM_RESERVE_DRAM
    hex
-    default 0x8000 if MEMMAP_TRACEMEM
+    default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
+    default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
    default 0x0

+# Not implemented and/or needs new silicon rev to work
 config MEMMAP_SPISRAM
    bool "Use external SPI SRAM chip as main memory"
+    depends on ESP32_NEEDS_NEW_SILICON_REV
    default "n"
    help
        The ESP32 can control an external SPI SRAM chip, adding the memory it contains to the 
@@ -140,4 +154,214 @@ config ULP_COPROC_RESERVE_MEM
    default 0
    depends on !ULP_COPROC_ENABLED

+
+choice ESP32_PANIC
+    prompt "Panic handler behaviour"
+    default ESP32_PANIC_PRINT_REBOOT
+    help
+        If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is 
+        invoked. Configure the panic handlers action here.
+
+config ESP32_PANIC_PRINT_HALT
+    bool "Print registers and halt"
+    help
+        Outputs the relevant registers over the serial port and halt the 
+        processor. Needs a manual reset to restart.
+
+config ESP32_PANIC_PRINT_REBOOT
+    bool "Print registers and reboot"
+    help
+        Outputs the relevant registers over the serial port and immediately
+        reset the processor.
+
+config ESP32_PANIC_SILENT_REBOOT
+    bool "Silent reboot"
+    help
+        Just resets the processor without outputting anything
+
+config ESP32_PANIC_GDBSTUB
+    bool "Invoke GDBStub"
+    help
+        Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
+        of the crash.
+endchoice
+
+config ESP32_DEBUG_OCDAWARE
+    bool "Make exception and panic handlers JTAG/OCD aware"
+    default y
+    help
+        The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
+        instead of panicking, have the debugger stop on the offending instruction.
+
+
+config INT_WDT
+    bool "Interrupt watchdog"
+    default y
+    help
+        This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
+        either because a task turned off interrupts and did not turn them on for a long time, or because an
+        interrupt handler did not return. It will try to invoke the panic handler first and failing that
+        reset the SoC.
+
+config INT_WDT_TIMEOUT_MS
+    int "Interrupt watchdog timeout (ms)"
+    depends on INT_WDT
+    default 300
+    range 10 10000
+    help
+        The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
+
+config INT_WDT_CHECK_CPU1
+    bool "Also watch CPU1 tick interrupt"
+    depends on INT_WDT && !FREERTOS_UNICORE
+    default y
+    help
+        Also detect if interrupts on CPU 1 are disabled for too long.
+
+config TASK_WDT
+    bool "Task watchdog"
+    default y
+    help
+        This watchdog timer can be used to make sure individual tasks are still running.
+
+config TASK_WDT_PANIC
+    bool "Invoke panic handler when Task Watchdog is triggered"
+    depends on TASK_WDT
+    default n
+    help
+        Normally, the Task Watchdog will only print out a warning if it detects it has not
+        been fed. If this is enabled, it will invoke the panic handler instead, which
+        can then halt or reboot the chip.
+
+config TASK_WDT_TIMEOUT_S
+    int "Task watchdog timeout (seconds)"
+    depends on TASK_WDT
+    range 1 60
+    default 5
+    help
+        Timeout for the task WDT, in seconds.
+
+config TASK_WDT_CHECK_IDLE_TASK
+    bool "Task watchdog watches CPU0 idle task"
+    depends on TASK_WDT
+    default y
+    help
+        With this turned on, the task WDT can detect if the idle task is not called within the task
+        watchdog timeout period. The idle task not being called usually is a symptom of another
+        task hoarding the CPU. It is also a bad thing because FreeRTOS household tasks depend on the 
+        idle task getting some runtime every now and then. Take Care: With this disabled, this 
+        watchdog will trigger if no tasks register themselves within the timeout value.
+
+config TASK_WDT_CHECK_IDLE_TASK_CPU1
+    bool "Task watchdog also watches CPU1 idle task"
+    depends on TASK_WDT_CHECK_IDLE_TASK && !FREERTOS_UNICORE
+    default y
+    help
+        Also check the idle task that runs on CPU1.
+
+#The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
+#silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
+config BROWNOUT_DET
+    bool "Hardware brownout detect & reset"
+    default y
+    depends on NEEDS_ESP32_NEW_SILICON_REV
+    help
+        The ESP32 has a built-in brownout detector which can detect if the voltage is lower than 
+        a specific value. If this happens, it will reset the chip in order to prevent unintended
+        behaviour.
+
+choice BROWNOUT_DET_LVL_SEL
+    prompt "Brownout voltage level"
+    depends on BROWNOUT_DET
+    default BROWNOUT_DET_LVL_SEL_25
+    help
+        The brownout detector will reset the chip when the supply voltage is below this level.
+
+#The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
+#of the brownout threshold levels.
+config BROWNOUT_DET_LVL_SEL_0
+    bool "2.1V"
+config BROWNOUT_DET_LVL_SEL_1
+    bool "2.2V"
+config BROWNOUT_DET_LVL_SEL_2
+    bool "2.3V"
+config BROWNOUT_DET_LVL_SEL_3
+    bool "2.4V"
+config BROWNOUT_DET_LVL_SEL_4
+    bool "2.5V"
+config BROWNOUT_DET_LVL_SEL_5
+    bool "2.6V"
+config BROWNOUT_DET_LVL_SEL_6
+    bool "2.7V"
+config BROWNOUT_DET_LVL_SEL_7
+    bool "2.8V"
+endchoice
+
+config BROWNOUT_DET_LVL
+    int
+    default 0 if BROWNOUT_DET_LVL_SEL_0
+    default 1 if BROWNOUT_DET_LVL_SEL_1
+    default 2 if BROWNOUT_DET_LVL_SEL_2
+    default 3 if BROWNOUT_DET_LVL_SEL_3
+    default 4 if BROWNOUT_DET_LVL_SEL_4
+    default 5 if BROWNOUT_DET_LVL_SEL_5
+    default 6 if BROWNOUT_DET_LVL_SEL_6
+    default 7 if BROWNOUT_DET_LVL_SEL_7
+
+
+config BROWNOUT_DET_RESETDELAY
+    int "Brownout reset delay (in uS)"
+    depends on BROWNOUT_DET
+    range 0 6820
+    default 1000
+    help
+        The brownout detector can reset the chip after a certain delay, in order to make sure e.g. a voltage dip has entirely passed
+        before trying to restart the chip. You can set the delay here.
+
+
+choice ESP32_TIME_SYSCALL
+	prompt "Timers used for gettimeofday function"
+	default ESP32_TIME_SYSCALL_USE_RTC_FRC1
+	help
+		This setting defines which hardware timers are used to
+		implement 'gettimeofday' and 'time' functions in C library.
+		
+		- If only FRC1 timer is used, gettimeofday will provide time at
+		  microsecond resolution. Time will not be preserved when going
+		  into deep sleep mode.
+		- If both FRC1 and RTC timers are used, timekeeping will
+		  continue in deep sleep. Time will be reported at 1 microsecond
+		  resolution.
+		- If only RTC timer is used, timekeeping will continue in
+		  deep sleep, but time will be measured at 6.(6) microsecond
+		  resolution. Also the gettimeofday function itself may take 
+		  longer to run.
+		- If no timers are used, gettimeofday and time functions
+		  return -1 and set errno to ENOSYS. 
+		  
+config ESP32_TIME_SYSCALL_USE_RTC
+    bool "RTC"
+config ESP32_TIME_SYSCALL_USE_RTC_FRC1
+    bool "RTC and FRC1"
+config ESP32_TIME_SYSCALL_USE_FRC1
+    bool "FRC1"
+config ESP32_TIME_SYSCALL_USE_NONE
+    bool "None"
+endchoice
+
+choice ESP32_RTC_CLOCK_SOURCE
+	prompt "RTC clock source"
+	default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
+	help
+		Choose which clock is used as RTC clock source.
+		The only available option for now is to use internal
+		150kHz RC oscillator.
+
+config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
+	bool "Internal RC"
+config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
+	bool "External 32kHz crystal"
+	depends on DOCUMENTATION_FOR_RTC_CNTL
+endchoice
+
 endmenu
--- a/components/esp32/brownout.c
+++ b/components/esp32/brownout.c
@@ -0,0 +1,39 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+#include "soc/soc.h"
+#include "soc/rtc_cntl_reg.h"
+
+
+#if CONFIG_BROWNOUT_DET
+/*
+This file is included in esp-idf, but the menuconfig option for this is disabled because a silicon bug
+prohibits the brownout detector from functioning correctly on the ESP32.
+*/
+
+void esp_brownout_init() {
+    WRITE_PERI_REG(RTC_CNTL_BROWN_OUT_REG, 
+            RTC_CNTL_BROWN_OUT_ENA | (CONFIG_BROWNOUT_DET_LVL << RTC_CNTL_DBROWN_OUT_THRES_S) |
+            RTC_CNTL_BROWN_OUT_RST_ENA | (((CONFIG_BROWNOUT_DET_RESETDELAY*150)/1000) << RTC_CNTL_BROWN_OUT_RST_WAIT_S) |
+            RTC_CNTL_BROWN_OUT_PD_RF_ENA|RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA);
+
+}
+
+#endif
--- a/components/esp32/component.mk
+++ b/components/esp32/component.mk
@@ -1,28 +1,20 @@
 #
 # Component Makefile
 #
-# This Makefile should, at the very least, just include $(IDF_PATH)/make/component_common.mk. By default, 
-# this will take the sources in this directory, compile them and link them into 
-# lib(subdirectory_name).a in the build directory. This behaviour is entirely configurable,
-# please read the esp-idf build system document if you need to do this.
-#
-include $(PROJECT_PATH)/build/include/config/auto.conf

 COMPONENT_SRCDIRS := . hwcrypto

-LIBS := crypto core net80211 phy rtc pp wpa smartconfig
+LIBS := core net80211 phy rtc pp wpa smartconfig coexist wps

 LINKER_SCRIPTS += -T esp32_out.ld -T esp32.common.ld -T esp32.rom.ld -T esp32.peripherals.ld

 COMPONENT_ADD_LDFLAGS := -lesp32 \
-                           $(abspath libhal.a) \
-                           -L$(abspath lib) \
+                           $(COMPONENT_PATH)/libhal.a \
+                           -L$(COMPONENT_PATH)/lib \
                           $(addprefix -l,$(LIBS)) \
-                          -L $(abspath ld) \
+                          -L $(COMPONENT_PATH)/ld \
                          $(LINKER_SCRIPTS)

-include $(IDF_PATH)/make/component_common.mk
-
 ALL_LIB_FILES := $(patsubst %,$(COMPONENT_PATH)/lib/lib%.a,$(LIBS))

 # automatically trigger a git submodule update
--- a/components/esp32/cpu_start.c
+++ b/components/esp32/cpu_start.c
@@ -19,6 +19,8 @@

 #include "rom/ets_sys.h"
 #include "rom/uart.h"
+#include "rom/rtc.h"
+#include "rom/cache.h"

 #include "soc/cpu.h"
 #include "soc/dport_reg.h"
@@ -41,7 +43,14 @@
 #include "esp_event.h"
 #include "esp_spi_flash.h"
 #include "esp_ipc.h"
+#include "esp_crosscore_int.h"
 #include "esp_log.h"
+#include "esp_vfs_dev.h"
+#include "esp_newlib.h"
+#include "esp_brownout.h"
+#include "esp_int_wdt.h"
+#include "esp_task_wdt.h"
+#include "trax.h"

 void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
 void start_cpu0_default(void) IRAM_ATTR;
@@ -54,11 +63,12 @@ static bool app_cpu_started = false;

 static void do_global_ctors(void);
 static void main_task(void* args);
-extern void ets_setup_syscalls(void);
 extern void app_main(void);

 extern int _bss_start;
 extern int _bss_end;
+extern int _rtc_bss_start;
+extern int _rtc_bss_end;
 extern int _init_start;
 extern void (*__init_array_start)(void);
 extern void (*__init_array_end)(void);
@@ -89,6 +99,11 @@ void IRAM_ATTR call_start_cpu0()

    memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));

+    /* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
+    if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
+        memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
+    }
+
    // Initialize heap allocator
    heap_alloc_caps_init();

@@ -96,7 +111,13 @@ void IRAM_ATTR call_start_cpu0()

 #if !CONFIG_FREERTOS_UNICORE
    ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
-
+    //Flush and enable icache for APP CPU
+    Cache_Flush(1);
+    Cache_Read_Enable(1);
+    //Un-stall the app cpu; the panic handler may have stalled it.
+    CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, RTC_CNTL_SW_STALL_APPCPU_C1_M);
+    CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_STALL_APPCPU_C0_M);
+    //Enable clock gating and reset the app cpu.
    SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
    CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
    SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
@@ -131,12 +152,41 @@ void IRAM_ATTR call_start_cpu1()

 void start_cpu0_default(void)
 {
+//Enable trace memory and immediately start trace.
+#if CONFIG_MEMMAP_TRACEMEM
+#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
+    trax_enable(TRAX_ENA_PRO_APP);
+#else
+    trax_enable(TRAX_ENA_PRO);
+#endif
+    trax_start_trace(TRAX_DOWNCOUNT_WORDS);
+#endif
    esp_set_cpu_freq();     // set CPU frequency configured in menuconfig
    uart_div_modify(0, (APB_CLK_FREQ << 4) / 115200);
-    ets_setup_syscalls();
+#if CONFIG_BROWNOUT_DET
+    esp_brownout_init();
+#endif
+#if CONFIG_INT_WDT
+    esp_int_wdt_init();
+#endif
+#if CONFIG_TASK_WDT
+    esp_task_wdt_init();
+#endif
+    esp_setup_syscall_table();
+    esp_setup_time_syscalls();
+    esp_vfs_dev_uart_register();
+    esp_reent_init(_GLOBAL_REENT);
+    const char* default_uart_dev = "/dev/uart/0";
+    _GLOBAL_REENT->_stdin  = fopen(default_uart_dev, "r");
+    _GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
+    _GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
    do_global_ctors();
+#if !CONFIG_FREERTOS_UNICORE
+    esp_crosscore_int_init();
+#endif
    esp_ipc_init();
    spi_flash_init();
+
    xTaskCreatePinnedToCore(&main_task, "main",
            ESP_TASK_MAIN_STACK, NULL,
            ESP_TASK_MAIN_PRIO, NULL, 0);
@@ -147,10 +197,14 @@ void start_cpu0_default(void)
 #if !CONFIG_FREERTOS_UNICORE
 void start_cpu1_default(void)
 {
+#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
+    trax_start_trace(TRAX_DOWNCOUNT_WORDS);
+#endif
    // Wait for FreeRTOS initialization to finish on PRO CPU
    while (port_xSchedulerRunning[0] == 0) {
        ;
    }
+    esp_crosscore_int_init();
    ESP_LOGI(TAG, "Starting scheduler on APP CPU.");
    xPortStartScheduler();
 }
--- a/components/esp32/crosscore_int.c
+++ b/components/esp32/crosscore_int.c
@@ -0,0 +1,98 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include <stdint.h>
+#include <string.h>
+
+#include "esp_attr.h"
+#include "esp_err.h"
+#include "esp_intr.h"
+
+#include "rom/ets_sys.h"
+#include "rom/uart.h"
+
+#include "soc/cpu.h"
+#include "soc/dport_reg.h"
+#include "soc/io_mux_reg.h"
+#include "soc/rtc_cntl_reg.h"
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/semphr.h"
+#include "freertos/queue.h"
+#include "freertos/portmacro.h"
+
+
+#define REASON_YIELD (1<<0)
+
+static portMUX_TYPE reasonSpinlock = portMUX_INITIALIZER_UNLOCKED;
+static volatile uint32_t reason[ portNUM_PROCESSORS ];
+
+
+/*
+ToDo: There is a small chance the CPU already has yielded when this ISR is serviced. In that case, it's running the intended task but
+the ISR will cause it to switch _away_ from it. portYIELD_FROM_ISR will probably just schedule the task again, but have to check that.
+*/
+static void esp_crosscore_isr(void *arg) {
+    uint32_t myReasonVal;
+    //A pointer to the correct reason array item is passed to this ISR.
+    volatile uint32_t *myReason=arg;
+
+    //Clear the interrupt first.
+    if (xPortGetCoreID()==0) {
+        WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, 0);
+    } else {
+        WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, 0);
+    }
+    //Grab the reason and clear it.
+    portENTER_CRITICAL(&reasonSpinlock);
+    myReasonVal=*myReason;
+    *myReason=0;
+    portEXIT_CRITICAL(&reasonSpinlock);
+
+    //Check what we need to do.
+    if (myReasonVal&REASON_YIELD) {
+        portYIELD_FROM_ISR();
+    }
+}
+
+//Initialize the crosscore interrupt on this core. Call this once
+//on each active core.
+void esp_crosscore_int_init() {
+    portENTER_CRITICAL(&reasonSpinlock);
+    reason[xPortGetCoreID()]=0;
+    portEXIT_CRITICAL(&reasonSpinlock);
+    ESP_INTR_DISABLE(ETS_FROM_CPU_INUM);
+    if (xPortGetCoreID()==0) {
+        intr_matrix_set(xPortGetCoreID(), ETS_FROM_CPU_INTR0_SOURCE, ETS_FROM_CPU_INUM);
+    } else {
+        intr_matrix_set(xPortGetCoreID(), ETS_FROM_CPU_INTR1_SOURCE, ETS_FROM_CPU_INUM);
+    }
+    xt_set_interrupt_handler(ETS_FROM_CPU_INUM, esp_crosscore_isr, (void*)&reason[xPortGetCoreID()]);
+    ESP_INTR_ENABLE(ETS_FROM_CPU_INUM);
+}
+
+void esp_crosscore_int_send_yield(int coreId) {
+    assert(coreId<portNUM_PROCESSORS);
+    //Mark the reason we interrupt the other CPU
+    portENTER_CRITICAL(&reasonSpinlock);
+    reason[coreId]|=REASON_YIELD;
+    portEXIT_CRITICAL(&reasonSpinlock);
+    //Poke the other CPU.
+    if (coreId==0) {
+        WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_0_REG, DPORT_CPU_INTR_FROM_CPU_0);
+    } else {
+        WRITE_PERI_REG(DPORT_CPU_INTR_FROM_CPU_1_REG, DPORT_CPU_INTR_FROM_CPU_1);
+    }
+}
+
--- a/components/esp32/deepsleep.c
+++ b/components/esp32/deepsleep.c
@@ -40,8 +40,7 @@ void esp_set_deep_sleep_wake_stub(esp_deep_sleep_wake_stub_fn_t new_stub)
 }

 void RTC_IRAM_ATTR esp_default_wake_deep_sleep(void) {
-    //
-    //mmu_init(0);
+    /* Clear MMU for CPU 0 */
    REG_SET_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
    REG_CLR_BIT(DPORT_PRO_CACHE_CTRL1_REG, DPORT_PRO_CACHE_MMU_IA_CLR);
 }
--- a/components/esp32/event_default_handlers.c
+++ b/components/esp32/event_default_handlers.c
@@ -18,9 +18,11 @@

 #include "esp_err.h"
 #include "esp_wifi.h"
+#include "esp_wifi_internal.h"
 #include "esp_event.h"
 #include "esp_event_loop.h"
 #include "esp_task.h"
+#include "rom/ets_sys.h"

 #include "freertos/FreeRTOS.h"
 #include "freertos/task.h"
@@ -66,6 +68,10 @@ static system_event_handle_t g_system_event_handle_table[] = {
    {SYSTEM_EVENT_STA_DISCONNECTED,    system_event_sta_disconnected_handle_default},
    {SYSTEM_EVENT_STA_AUTHMODE_CHANGE, NULL},
    {SYSTEM_EVENT_STA_GOT_IP,          system_event_sta_got_ip_default},
+    {SYSTEM_EVENT_STA_WPS_ER_SUCCESS,  NULL},
+    {SYSTEM_EVENT_STA_WPS_ER_FAILED,   NULL},
+    {SYSTEM_EVENT_STA_WPS_ER_TIMEOUT,  NULL},
+    {SYSTEM_EVENT_STA_WPS_ER_PIN,      NULL},
    {SYSTEM_EVENT_AP_START,            system_event_ap_start_handle_default},
    {SYSTEM_EVENT_AP_STOP,             system_event_ap_stop_handle_default},
    {SYSTEM_EVENT_AP_STACONNECTED,     NULL},
@@ -76,8 +82,7 @@ static system_event_handle_t g_system_event_handle_table[] = {

 static esp_err_t system_event_sta_got_ip_default(system_event_t *event)
 {
-    extern esp_err_t esp_wifi_set_sta_ip(void);
-    WIFI_API_CALL_CHECK("esp_wifi_set_sta_ip", esp_wifi_set_sta_ip(), ESP_OK);
+    WIFI_API_CALL_CHECK("esp_wifi_internal_set_sta_ip", esp_wifi_internal_set_sta_ip(), ESP_OK);

    ESP_LOGI(TAG, "ip: " IPSTR ", mask: " IPSTR ", gw: " IPSTR,
           IP2STR(&event->event_info.got_ip.ip_info.ip),
@@ -92,7 +97,7 @@ esp_err_t system_event_ap_start_handle_default(system_event_t *event)
    tcpip_adapter_ip_info_t ap_ip;
    uint8_t ap_mac[6];

-    WIFI_API_CALL_CHECK("esp_wifi_reg_rxcb", esp_wifi_reg_rxcb(WIFI_IF_AP, (wifi_rxcb_t)tcpip_adapter_ap_input), ESP_OK);
+    WIFI_API_CALL_CHECK("esp_wifi_internal_reg_rxcb", esp_wifi_internal_reg_rxcb(WIFI_IF_AP, (wifi_rxcb_t)tcpip_adapter_ap_input), ESP_OK);
    WIFI_API_CALL_CHECK("esp_wifi_mac_get",  esp_wifi_get_mac(WIFI_IF_AP, ap_mac), ESP_OK);

    tcpip_adapter_get_ip_info(TCPIP_ADAPTER_IF_AP, &ap_ip);
@@ -103,7 +108,7 @@ esp_err_t system_event_ap_start_handle_default(system_event_t *event)

 esp_err_t system_event_ap_stop_handle_default(system_event_t *event)
 {
-    WIFI_API_CALL_CHECK("esp_wifi_reg_rxcb", esp_wifi_reg_rxcb(WIFI_IF_AP, NULL), ESP_OK);
+    WIFI_API_CALL_CHECK("esp_wifi_internal_reg_rxcb", esp_wifi_internal_reg_rxcb(WIFI_IF_AP, NULL), ESP_OK);

    tcpip_adapter_stop(TCPIP_ADAPTER_IF_AP);

@@ -133,7 +138,7 @@ esp_err_t system_event_sta_connected_handle_default(system_event_t *event)
 {
    tcpip_adapter_dhcp_status_t status;

-    WIFI_API_CALL_CHECK("esp_wifi_reg_rxcb", esp_wifi_reg_rxcb(WIFI_IF_STA, (wifi_rxcb_t)tcpip_adapter_sta_input), ESP_OK);
+    WIFI_API_CALL_CHECK("esp_wifi_internal_reg_rxcb", esp_wifi_internal_reg_rxcb(WIFI_IF_STA, (wifi_rxcb_t)tcpip_adapter_sta_input), ESP_OK);

    tcpip_adapter_up(TCPIP_ADAPTER_IF_STA);

@@ -165,7 +170,7 @@ esp_err_t system_event_sta_connected_handle_default(system_event_t *event)
 esp_err_t system_event_sta_disconnected_handle_default(system_event_t *event)
 {
    tcpip_adapter_down(TCPIP_ADAPTER_IF_STA);
-    WIFI_API_CALL_CHECK("esp_wifi_reg_rxcb", esp_wifi_reg_rxcb(WIFI_IF_STA, NULL), ESP_OK);
+    WIFI_API_CALL_CHECK("esp_wifi_internal_reg_rxcb", esp_wifi_internal_reg_rxcb(WIFI_IF_STA, NULL), ESP_OK);
    return ESP_OK;
 }

@@ -196,16 +201,14 @@ static esp_err_t esp_system_event_debug(system_event_t *event)
    }
    case SYSTEM_EVENT_STA_CONNECTED: {
        system_event_sta_connected_t *connected = &event->event_info.connected;
-        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_CONNECTED, ssid:%s, ssid_len:%d, bssid:%02x:%02x:%02x:%02x:%02x:%02x, channel:%d, authmode:%d", \
-                   connected->ssid, connected->ssid_len, connected->bssid[0], connected->bssid[0], connected->bssid[1], \
-                   connected->bssid[3], connected->bssid[4], connected->bssid[5], connected->channel, connected->authmode);
+        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_CONNECTED, ssid:%s, ssid_len:%d, bssid:" MACSTR ", channel:%d, authmode:%d", \
+                   connected->ssid, connected->ssid_len, MAC2STR(connected->bssid), connected->channel, connected->authmode);
        break;
    }
    case SYSTEM_EVENT_STA_DISCONNECTED: {
        system_event_sta_disconnected_t *disconnected = &event->event_info.disconnected;
-        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_DISCONNECTED, ssid:%s, ssid_len:%d, bssid:%02x:%02x:%02x:%02x:%02x:%02x, reason:%d", \
-                   disconnected->ssid, disconnected->ssid_len, disconnected->bssid[0], disconnected->bssid[0], disconnected->bssid[1], \
-                   disconnected->bssid[3], disconnected->bssid[4], disconnected->bssid[5], disconnected->reason);
+        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_DISCONNECTED, ssid:%s, ssid_len:%d, bssid:" MACSTR ", reason:%d", \
+                   disconnected->ssid, disconnected->ssid_len, MAC2STR(disconnected->bssid), disconnected->reason);
        break;
    }
    case SYSTEM_EVENT_STA_AUTHMODE_CHANGE: {
@@ -221,6 +224,22 @@ static esp_err_t esp_system_event_debug(system_event_t *event)
            IP2STR(&got_ip->ip_info.gw));
        break;
    }
+    case SYSTEM_EVENT_STA_WPS_ER_SUCCESS: {
+        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_WPS_ER_SUCCESS");
+        break;
+    }
+    case SYSTEM_EVENT_STA_WPS_ER_FAILED: {
+        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_WPS_ER_FAILED");
+        break;
+    }
+    case SYSTEM_EVENT_STA_WPS_ER_TIMEOUT: {
+        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_WPS_ER_TIMEOUT");
+        break;
+    }
+    case SYSTEM_EVENT_STA_WPS_ER_PIN: {
+        ESP_LOGD(TAG, "SYSTEM_EVENT_STA_WPS_ER_PIN");
+        break;
+    }
    case SYSTEM_EVENT_AP_START: {
        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_START");
        break;
@@ -231,23 +250,21 @@ static esp_err_t esp_system_event_debug(system_event_t *event)
    }
    case SYSTEM_EVENT_AP_STACONNECTED: {
        system_event_ap_staconnected_t *staconnected = &event->event_info.sta_connected;
-        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_STACONNECTED, mac:%02x:%02x:%02x:%02x:%02x:%02x, aid:%d", \
-                   staconnected->mac[0], staconnected->mac[0], staconnected->mac[1], \
-                   staconnected->mac[3], staconnected->mac[4], staconnected->mac[5], staconnected->aid);
+        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_STACONNECTED, mac:" MACSTR ", aid:%d", \
+                   MAC2STR(staconnected->mac), staconnected->aid);
        break;
    }
    case SYSTEM_EVENT_AP_STADISCONNECTED: {
        system_event_ap_stadisconnected_t *stadisconnected = &event->event_info.sta_disconnected;
-        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_STADISCONNECTED, mac:%02x:%02x:%02x:%02x:%02x:%02x, aid:%d", \
-                   stadisconnected->mac[0], stadisconnected->mac[0], stadisconnected->mac[1], \
-                   stadisconnected->mac[3], stadisconnected->mac[4], stadisconnected->mac[5], stadisconnected->aid);
+        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_STADISCONNECTED, mac:" MACSTR ", aid:%d", \
+                   MAC2STR(stadisconnected->mac), stadisconnected->aid);
        break;
    }
    case SYSTEM_EVENT_AP_PROBEREQRECVED: {
        system_event_ap_probe_req_rx_t *ap_probereqrecved = &event->event_info.ap_probereqrecved;
-        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_PROBEREQRECVED, rssi:%d, mac:%02x:%02x:%02x:%02x:%02x:%02x", \
-                   ap_probereqrecved->rssi, ap_probereqrecved->mac[0], ap_probereqrecved->mac[0], ap_probereqrecved->mac[1], \
-                   ap_probereqrecved->mac[3], ap_probereqrecved->mac[4], ap_probereqrecved->mac[5]);
+        ESP_LOGD(TAG, "SYSTEM_EVENT_AP_PROBEREQRECVED, rssi:%d, mac:" MACSTR, \
+                   ap_probereqrecved->rssi, \
+                   MAC2STR(ap_probereqrecved->mac));
        break;
    }
    default: {
--- a/components/esp32/freertos_hooks.c
+++ b/components/esp32/freertos_hooks.c
@@ -0,0 +1,96 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include "esp_attr.h"
+#include "esp_freertos_hooks.h"
+
+//We use just a static array here because it's not expected many components will need
+//an idle or tick hook.
+#define MAX_HOOKS 8
+
+static esp_freertos_idle_cb_t idle_cb[MAX_HOOKS]={0};
+static esp_freertos_tick_cb_t tick_cb[MAX_HOOKS]={0};
+
+void IRAM_ATTR esp_vApplicationTickHook() 
+{
+    int n;
+    for (n=0; n<MAX_HOOKS; n++) {
+        if (tick_cb[n]!=NULL) {
+            tick_cb[n]();
+        }
+    }
+}
+
+void esp_vApplicationIdleHook() 
+{
+    bool doWait=true;
+    bool r;
+    int n;
+    for (n=0; n<MAX_HOOKS; n++) {
+        if (idle_cb[n]!=NULL) {
+            r=idle_cb[n]();
+            if (!r) doWait=false;
+        }
+    }
+    if (doWait) {
+        //Wait for whatever interrupt comes next... this should save some power.
+        asm("waiti 0");
+    }
+}
+
+
+esp_err_t esp_register_freertos_idle_hook(esp_freertos_idle_cb_t new_idle_cb) 
+{
+    int n;
+    for (n=0; n<MAX_HOOKS; n++) {
+        if (idle_cb[n]==NULL) {
+            idle_cb[n]=new_idle_cb;
+            return ESP_OK;
+        }
+    }
+    return ESP_ERR_NO_MEM;
+}
+
+esp_err_t esp_register_freertos_tick_hook(esp_freertos_tick_cb_t new_tick_cb) 
+{
+    int n;
+    for (n=0; n<MAX_HOOKS; n++) {
+        if (tick_cb[n]==NULL) {
+            tick_cb[n]=new_tick_cb;
+            return ESP_OK;
+        }
+    }
+    return ESP_ERR_NO_MEM;
+}
+
+void esp_deregister_freertos_idle_hook(esp_freertos_idle_cb_t old_idle_cb)
+{
+    int n;
+    for (n=0; n<MAX_HOOKS; n++) {
+        if (idle_cb[n]==old_idle_cb) idle_cb[n]=NULL;
+    }
+}
+
+void esp_deregister_freertos_tick_hook(esp_freertos_tick_cb_t old_tick_cb)
+{
+    int n;
+    for (n=0; n<MAX_HOOKS; n++) {
+        if (tick_cb[n]==old_tick_cb) tick_cb[n]=NULL;
+    }
+}
+
--- a/components/esp32/gdbstub.c
+++ b/components/esp32/gdbstub.c
@@ -0,0 +1,366 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/******************************************************************************
+ * Description: A stub to make the ESP32 debuggable by GDB over the serial 
+ * port, at least enough to do a backtrace on panic. This gdbstub is read-only:
+ * it allows inspecting the ESP32 state 
+ *******************************************************************************/
+
+//ToDo: Clean up includes and sync to real rtos
+#include "rom/ets_sys.h"
+
+#include "soc/uart_reg.h"
+#include "soc/io_mux_reg.h"
+
+#include "esp_gdbstub.h"
+#include "driver/gpio.h"
+
+//Length of buffer used to reserve GDB commands. Has to be at least able to fit the G command, which
+//implies a minimum size of about 320 bytes.
+#define PBUFLEN 512
+
+static unsigned char cmd[PBUFLEN];		//GDB command input buffer
+static char chsum;						//Running checksum of the output packet
+
+#define ATTR_GDBFN
+
+static void ATTR_GDBFN keepWDTalive() {
+	//ToDo for esp31/32
+}
+
+
+//Receive a char from the uart. Uses polling and feeds the watchdog.
+static int ATTR_GDBFN gdbRecvChar() {
+	int i;
+	while (((READ_PERI_REG(UART_STATUS_REG(0))>>UART_RXFIFO_CNT_S)&UART_RXFIFO_CNT)==0) {
+		keepWDTalive();
+	}
+	i=READ_PERI_REG(UART_FIFO_REG(0));
+	return i;
+}
+
+//Send a char to the uart.
+static void ATTR_GDBFN gdbSendChar(char c) {
+	while (((READ_PERI_REG(UART_STATUS_REG(0))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=126) ;
+	WRITE_PERI_REG(UART_FIFO_REG(0), c);
+}
+
+//Send the start of a packet; reset checksum calculation.
+static void ATTR_GDBFN gdbPacketStart() {
+	chsum=0;
+	gdbSendChar('$');
+}
+
+//Send a char as part of a packet
+static void ATTR_GDBFN gdbPacketChar(char c) {
+	if (c=='#' || c=='$' || c=='}' || c=='*') {
+		gdbSendChar('}');
+		gdbSendChar(c^0x20);
+		chsum+=(c^0x20)+'}';
+	} else {
+		gdbSendChar(c);
+		chsum+=c;
+	}
+}
+
+//Send a string as part of a packet
+static void ATTR_GDBFN gdbPacketStr(char *c) {
+	while (*c!=0) {
+		gdbPacketChar(*c);
+		c++;
+	}
+}
+
+//Send a hex val as part of a packet. 'bits'/4 dictates the number of hex chars sent.
+static void ATTR_GDBFN gdbPacketHex(int val, int bits) {
+	char hexChars[]="0123456789abcdef";
+	int i;
+	for (i=bits; i>0; i-=4) {
+		gdbPacketChar(hexChars[(val>>(i-4))&0xf]);
+	}
+}
+
+//Finish sending a packet.
+static void ATTR_GDBFN gdbPacketEnd() {
+	gdbSendChar('#');
+	gdbPacketHex(chsum, 8);
+}
+
+//Error states used by the routines that grab stuff from the incoming gdb packet
+#define ST_ENDPACKET -1
+#define ST_ERR -2
+#define ST_OK -3
+#define ST_CONT -4
+
+//Grab a hex value from the gdb packet. Ptr will get positioned on the end
+//of the hex string, as far as the routine has read into it. Bits/4 indicates
+//the max amount of hex chars it gobbles up. Bits can be -1 to eat up as much
+//hex chars as possible.
+static long ATTR_GDBFN gdbGetHexVal(unsigned char **ptr, int bits) {
+	int i;
+	int no;
+	unsigned int v=0;
+	char c;
+	no=bits/4;
+	if (bits==-1) no=64;
+	for (i=0; i<no; i++) {
+		c=**ptr;
+		(*ptr)++;
+		if (c>='0' && c<='9') {
+			v<<=4;
+			v|=(c-'0');
+		} else if (c>='A' && c<='F') {
+			v<<=4;
+			v|=(c-'A')+10;
+		} else if (c>='a' && c<='f') {
+			v<<=4;
+			v|=(c-'a')+10;
+		} else if (c=='#') {
+			if (bits==-1) {
+				(*ptr)--;
+				return v;
+			}
+			return ST_ENDPACKET;
+		} else {
+			if (bits==-1) {
+				(*ptr)--;
+				return v;
+			}
+			return ST_ERR;
+		}
+	}
+	return v;
+}
+
+//Swap an int into the form gdb wants it
+static int ATTR_GDBFN iswap(int i) {
+	int r;
+	r=((i>>24)&0xff);
+	r|=((i>>16)&0xff)<<8;
+	r|=((i>>8)&0xff)<<16;
+	r|=((i>>0)&0xff)<<24;
+	return r;
+}
+
+//Read a byte from ESP32 memory.
+static unsigned char ATTR_GDBFN readbyte(unsigned int p) {
+	int *i=(int*)(p&(~3));
+	if (p<0x20000000 || p>=0x80000000) return -1;
+	return *i>>((p&3)*8);
+}
+
+
+//Register file in the format exp108 gdb port expects it.
+//Inspired by gdb/regformats/reg-xtensa.dat
+typedef struct {
+	uint32_t pc;
+	uint32_t a[64];
+	uint32_t lbeg;
+	uint32_t lend;
+	uint32_t lcount;
+	uint32_t sar;
+	uint32_t windowbase;
+	uint32_t windowstart;
+	uint32_t configid0;
+	uint32_t configid1;
+	uint32_t ps;
+	uint32_t threadptr;
+	uint32_t br;
+	uint32_t scompare1;
+	uint32_t acclo;
+	uint32_t acchi;
+	uint32_t m0;
+	uint32_t m1;
+	uint32_t m2;
+	uint32_t m3;
+	uint32_t expstate;  //I'm going to assume this is exccause...
+	uint32_t f64r_lo;
+	uint32_t f64r_hi;
+	uint32_t f64s;
+	uint32_t f[16];
+	uint32_t fcr;
+	uint32_t fsr;
+} GdbRegFile;
+
+
+GdbRegFile gdbRegFile;
+
+/* 
+//Register format as the Xtensa HAL has it:
+STRUCT_FIELD (long, 4, XT_STK_EXIT,     exit)
+STRUCT_FIELD (long, 4, XT_STK_PC,       pc)
+STRUCT_FIELD (long, 4, XT_STK_PS,       ps)
+STRUCT_FIELD (long, 4, XT_STK_A0,       a0)
+[..]
+STRUCT_FIELD (long, 4, XT_STK_A15,      a15)
+STRUCT_FIELD (long, 4, XT_STK_SAR,      sar)
+STRUCT_FIELD (long, 4, XT_STK_EXCCAUSE, exccause)
+STRUCT_FIELD (long, 4, XT_STK_EXCVADDR, excvaddr)
+STRUCT_FIELD (long, 4, XT_STK_LBEG,   lbeg)
+STRUCT_FIELD (long, 4, XT_STK_LEND,   lend)
+STRUCT_FIELD (long, 4, XT_STK_LCOUNT, lcount)
+// Temporary space for saving stuff during window spill 
+STRUCT_FIELD (long, 4, XT_STK_TMP0,   tmp0)
+STRUCT_FIELD (long, 4, XT_STK_TMP1,   tmp1)
+STRUCT_FIELD (long, 4, XT_STK_TMP2,   tmp2)
+STRUCT_FIELD (long, 4, XT_STK_VPRI,   vpri)
+STRUCT_FIELD (long, 4, XT_STK_OVLY,   ovly)
+#endif
+STRUCT_END(XtExcFrame)
+*/
+
+
+static void dumpHwToRegfile(XtExcFrame *frame) {
+	int i;
+	long *frameAregs=&frame->a0;
+	gdbRegFile.pc=frame->pc;
+	for (i=0; i<16; i++) gdbRegFile.a[i]=frameAregs[i];
+	for (i=16; i<64; i++) gdbRegFile.a[i]=0xDEADBEEF;
+	gdbRegFile.lbeg=frame->lbeg;
+	gdbRegFile.lend=frame->lend;
+	gdbRegFile.lcount=frame->lcount;
+	gdbRegFile.sar=frame->sar;
+	//All windows have been spilled to the stack by the ISR routines. The following values should indicate that.
+	gdbRegFile.sar=frame->sar;
+	gdbRegFile.windowbase=0; //0
+	gdbRegFile.windowstart=0x1; //1
+	gdbRegFile.configid0=0xdeadbeef; //ToDo
+	gdbRegFile.configid1=0xdeadbeef; //ToDo
+	gdbRegFile.ps=frame->ps-PS_EXCM_MASK;
+	gdbRegFile.threadptr=0xdeadbeef; //ToDo
+	gdbRegFile.br=0xdeadbeef; //ToDo
+	gdbRegFile.scompare1=0xdeadbeef; //ToDo
+	gdbRegFile.acclo=0xdeadbeef; //ToDo
+	gdbRegFile.acchi=0xdeadbeef; //ToDo
+	gdbRegFile.m0=0xdeadbeef; //ToDo
+	gdbRegFile.m1=0xdeadbeef; //ToDo
+	gdbRegFile.m2=0xdeadbeef; //ToDo
+	gdbRegFile.m3=0xdeadbeef; //ToDo
+	gdbRegFile.expstate=frame->exccause; //ToDo
+}
+
+
+//Send the reason execution is stopped to GDB.
+static void sendReason() {
+	//exception-to-signal mapping
+	char exceptionSignal[]={4,31,11,11,2,6,8,0,6,7,0,0,7,7,7,7};
+	int i=0;
+	gdbPacketStart();
+	gdbPacketChar('T');
+	i=gdbRegFile.expstate&0x7f;
+	if (i<sizeof(exceptionSignal)) return gdbPacketHex(exceptionSignal[i], 8); else gdbPacketHex(11, 8);
+	gdbPacketEnd();
+}
+
+//Handle a command as received from GDB.
+static int gdbHandleCommand(unsigned char *cmd, int len) {
+	//Handle a command
+	int i, j, k;
+	unsigned char *data=cmd+1;
+	if (cmd[0]=='g') {		//send all registers to gdb
+		int *p=(int*)&gdbRegFile;
+		gdbPacketStart();
+		for (i=0; i<sizeof(GdbRegFile)/4; i++) gdbPacketHex(iswap(*p++), 32);
+		gdbPacketEnd();
+	} else if (cmd[0]=='G') {	//receive content for all registers from gdb
+		int *p=(int*)&gdbRegFile;
+		for (i=0; i<sizeof(GdbRegFile)/4; i++) *p++=iswap(gdbGetHexVal(&data, 32));;
+		gdbPacketStart();
+		gdbPacketStr("OK");
+		gdbPacketEnd();
+	} else if (cmd[0]=='m') {	//read memory to gdb
+		i=gdbGetHexVal(&data, -1);
+		data++;
+		j=gdbGetHexVal(&data, -1);
+		gdbPacketStart();
+		for (k=0; k<j; k++) {
+			gdbPacketHex(readbyte(i++), 8);
+		}
+		gdbPacketEnd();
+	} else if (cmd[0]=='?') {	//Reply with stop reason
+		sendReason();
+	} else {
+		//We don't recognize or support whatever GDB just sent us.
+		gdbPacketStart();
+		gdbPacketEnd();
+		return ST_ERR;
+	}
+	return ST_OK;
+}
+
+
+//Lower layer: grab a command packet and check the checksum
+//Calls gdbHandleCommand on the packet if the checksum is OK
+//Returns ST_OK on success, ST_ERR when checksum fails, a 
+//character if it is received instead of the GDB packet
+//start char.
+static int gdbReadCommand() {
+	unsigned char c;
+	unsigned char chsum=0, rchsum;
+	unsigned char sentchs[2];
+	int p=0;
+	unsigned char *ptr;
+	c=gdbRecvChar();
+	if (c!='$') return c;
+	while(1) {
+		c=gdbRecvChar();
+		if (c=='#') {	//end of packet, checksum follows
+			cmd[p]=0;
+			break;
+		}
+		chsum+=c;
+		if (c=='$') {
+			//Wut, restart packet?
+			chsum=0;
+			p=0;
+			continue;
+		}
+		if (c=='}') {		//escape the next char
+			c=gdbRecvChar();
+			chsum+=c;
+			c^=0x20;
+		}
+		cmd[p++]=c;
+		if (p>=PBUFLEN) return ST_ERR;
+	}
+	//A # has been received. Get and check the received chsum.
+	sentchs[0]=gdbRecvChar();
+	sentchs[1]=gdbRecvChar();
+	ptr=&sentchs[0];
+	rchsum=gdbGetHexVal(&ptr, 8);
+//	ets_printf("c %x r %x\n", chsum, rchsum);
+	if (rchsum!=chsum) {
+		gdbSendChar('-');
+		return ST_ERR;
+	} else {
+		gdbSendChar('+');
+		return gdbHandleCommand(cmd, p);
+	}
+}
+
+
+
+void esp_gdbstub_panic_handler(XtExcFrame *frame) {
+	dumpHwToRegfile(frame);
+	//Make sure txd/rxd are enabled
+	gpio_pullup_dis(1);
+	PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0RXD_U, FUNC_U0RXD_U0RXD);
+	PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD_U0TXD);
+
+	sendReason();
+	while(gdbReadCommand()!=ST_CONT);
+	while(1);
+}
+
--- a/components/esp32/heap_alloc_caps.c
+++ b/components/esp32/heap_alloc_caps.c
@@ -15,7 +15,7 @@

 #include <freertos/heap_regions.h>

-#include "heap_alloc_caps.h"
+#include "esp_heap_alloc_caps.h"
 #include "spiram.h"
 #include "esp_log.h"

@@ -40,23 +40,23 @@ Tag descriptors. These describe the capabilities of a bit of memory that's tagge
 Each tag contains NO_PRIOS entries; later entries are only taken if earlier ones can't fulfill the memory request.
 */
 static const uint32_t tagDesc[][NO_PRIOS]={
-	{ MALLOC_CAP_DMA|MALLOC_CAP_8BIT, MALLOC_CAP_32BIT, 0 },					//Tag 0: Plain ole D-port RAM
-	{ 0, MALLOC_CAP_DMA|MALLOC_CAP_8BIT, MALLOC_CAP_32BIT|MALLOC_CAP_EXEC },	//Tag 1: Plain ole D-port RAM which has an alias on the I-port
-	{ MALLOC_CAP_EXEC|MALLOC_CAP_32BIT, 0, 0 },									//Tag 2: IRAM
-	{ MALLOC_CAP_PID2, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },					//Tag 3-8: PID 2-7 IRAM
-	{ MALLOC_CAP_PID3, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },					//
-	{ MALLOC_CAP_PID4, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },					//
-	{ MALLOC_CAP_PID5, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },					//
-	{ MALLOC_CAP_PID6, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },					//
-	{ MALLOC_CAP_PID7, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },					//
-	{ MALLOC_CAP_PID2, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },						//Tag 9-14: PID 2-7 DRAM
-	{ MALLOC_CAP_PID3, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },						//
-	{ MALLOC_CAP_PID4, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },						//
-	{ MALLOC_CAP_PID5, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },						//
-	{ MALLOC_CAP_PID6, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },						//
-	{ MALLOC_CAP_PID7, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },						//
-	{ MALLOC_CAP_SPISRAM, 0, MALLOC_CAP_DMA|MALLOC_CAP_8BIT|MALLOC_CAP_32BIT}, //Tag 15: SPI SRAM data
-	{ MALLOC_CAP_INVALID, MALLOC_CAP_INVALID, MALLOC_CAP_INVALID } //End
+    { MALLOC_CAP_DMA|MALLOC_CAP_8BIT, MALLOC_CAP_32BIT, 0 },                    //Tag 0: Plain ole D-port RAM
+    { 0, MALLOC_CAP_DMA|MALLOC_CAP_8BIT, MALLOC_CAP_32BIT|MALLOC_CAP_EXEC },    //Tag 1: Plain ole D-port RAM which has an alias on the I-port
+    { MALLOC_CAP_EXEC|MALLOC_CAP_32BIT, 0, 0 },                                 //Tag 2: IRAM
+    { MALLOC_CAP_PID2, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },                   //Tag 3-8: PID 2-7 IRAM
+    { MALLOC_CAP_PID3, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },                   //
+    { MALLOC_CAP_PID4, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },                   //
+    { MALLOC_CAP_PID5, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },                   //
+    { MALLOC_CAP_PID6, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },                   //
+    { MALLOC_CAP_PID7, 0, MALLOC_CAP_EXEC|MALLOC_CAP_32BIT },                   //
+    { MALLOC_CAP_PID2, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },                     //Tag 9-14: PID 2-7 DRAM
+    { MALLOC_CAP_PID3, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },                     //
+    { MALLOC_CAP_PID4, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },                     //
+    { MALLOC_CAP_PID5, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },                     //
+    { MALLOC_CAP_PID6, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },                     //
+    { MALLOC_CAP_PID7, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT },                     //
+    { MALLOC_CAP_SPISRAM, 0, MALLOC_CAP_DMA|MALLOC_CAP_8BIT|MALLOC_CAP_32BIT}, //Tag 15: SPI SRAM data
+    { MALLOC_CAP_INVALID, MALLOC_CAP_INVALID, MALLOC_CAP_INVALID } //End
 };

 /*
@@ -79,81 +79,81 @@ be sorted from low to high start address.
 This array is *NOT* const because it gets modified depending on what pools are/aren't available.
 */
 static HeapRegionTagged_t regions[]={
-	{ (uint8_t *)0x3F800000, 0x20000, 15, 0}, //SPI SRAM, if available
-	{ (uint8_t *)0x3FFAE000, 0x2000, 0, 0}, //pool 16 <- used for rom code
-	{ (uint8_t *)0x3FFB0000, 0x8000, 0, 0}, //pool 15 <- can be used for BT
-	{ (uint8_t *)0x3FFB8000, 0x8000, 0, 0}, //pool 14 <- can be used for BT
-	{ (uint8_t *)0x3FFC0000, 0x2000, 0, 0}, //pool 10-13, mmu page 0
-	{ (uint8_t *)0x3FFC2000, 0x2000, 0, 0}, //pool 10-13, mmu page 1
-	{ (uint8_t *)0x3FFC4000, 0x2000, 0, 0}, //pool 10-13, mmu page 2
-	{ (uint8_t *)0x3FFC6000, 0x2000, 0, 0}, //pool 10-13, mmu page 3
-	{ (uint8_t *)0x3FFC8000, 0x2000, 0, 0}, //pool 10-13, mmu page 4
-	{ (uint8_t *)0x3FFCA000, 0x2000, 0, 0}, //pool 10-13, mmu page 5
-	{ (uint8_t *)0x3FFCC000, 0x2000, 0, 0}, //pool 10-13, mmu page 6
-	{ (uint8_t *)0x3FFCE000, 0x2000, 0, 0}, //pool 10-13, mmu page 7
-	{ (uint8_t *)0x3FFD0000, 0x2000, 0, 0}, //pool 10-13, mmu page 8
-	{ (uint8_t *)0x3FFD2000, 0x2000, 0, 0}, //pool 10-13, mmu page 9
-	{ (uint8_t *)0x3FFD4000, 0x2000, 0, 0}, //pool 10-13, mmu page 10
-	{ (uint8_t *)0x3FFD6000, 0x2000, 0, 0}, //pool 10-13, mmu page 11
-	{ (uint8_t *)0x3FFD8000, 0x2000, 0, 0}, //pool 10-13, mmu page 12
-	{ (uint8_t *)0x3FFDA000, 0x2000, 0, 0}, //pool 10-13, mmu page 13
-	{ (uint8_t *)0x3FFDC000, 0x2000, 0, 0}, //pool 10-13, mmu page 14
-	{ (uint8_t *)0x3FFDE000, 0x2000, 0, 0}, //pool 10-13, mmu page 15
-	{ (uint8_t *)0x3FFE0000, 0x4000, 1, 0x400BC000}, //pool 9 blk 1
-	{ (uint8_t *)0x3FFE4000, 0x4000, 1, 0x400B8000}, //pool 9 blk 0
-	{ (uint8_t *)0x3FFE8000, 0x8000, 1, 0x400B0000}, //pool 8 <- can be remapped to ROM, used for MAC dump
-	{ (uint8_t *)0x3FFF0000, 0x8000, 1, 0x400A8000}, //pool 7 <- can be used for MAC dump
-	{ (uint8_t *)0x3FFF8000, 0x4000, 1, 0x400A4000}, //pool 6 blk 1 <- can be used as trace memory
-	{ (uint8_t *)0x3FFFC000, 0x4000, 1, 0x400A0000}, //pool 6 blk 0 <- can be used as trace memory
-	{ (uint8_t *)0x40070000, 0x8000, 2, 0}, //pool 0
-	{ (uint8_t *)0x40078000, 0x8000, 2, 0}, //pool 1
-	{ (uint8_t *)0x40080000, 0x2000, 2, 0}, //pool 2-5, mmu page 0
-	{ (uint8_t *)0x40082000, 0x2000, 2, 0}, //pool 2-5, mmu page 1
-	{ (uint8_t *)0x40084000, 0x2000, 2, 0}, //pool 2-5, mmu page 2
-	{ (uint8_t *)0x40086000, 0x2000, 2, 0}, //pool 2-5, mmu page 3
-	{ (uint8_t *)0x40088000, 0x2000, 2, 0}, //pool 2-5, mmu page 4
-	{ (uint8_t *)0x4008A000, 0x2000, 2, 0}, //pool 2-5, mmu page 5
-	{ (uint8_t *)0x4008C000, 0x2000, 2, 0}, //pool 2-5, mmu page 6
-	{ (uint8_t *)0x4008E000, 0x2000, 2, 0}, //pool 2-5, mmu page 7
-	{ (uint8_t *)0x40090000, 0x2000, 2, 0}, //pool 2-5, mmu page 8
-	{ (uint8_t *)0x40092000, 0x2000, 2, 0}, //pool 2-5, mmu page 9
-	{ (uint8_t *)0x40094000, 0x2000, 2, 0}, //pool 2-5, mmu page 10
-	{ (uint8_t *)0x40096000, 0x2000, 2, 0}, //pool 2-5, mmu page 11
-	{ (uint8_t *)0x40098000, 0x2000, 2, 0}, //pool 2-5, mmu page 12
-	{ (uint8_t *)0x4009A000, 0x2000, 2, 0}, //pool 2-5, mmu page 13
-	{ (uint8_t *)0x4009C000, 0x2000, 2, 0}, //pool 2-5, mmu page 14
-	{ (uint8_t *)0x4009E000, 0x2000, 2, 0}, //pool 2-5, mmu page 15
-	{ NULL, 0, 0, 0} //end
+    { (uint8_t *)0x3F800000, 0x20000, 15, 0}, //SPI SRAM, if available
+    { (uint8_t *)0x3FFAE000, 0x2000, 0, 0}, //pool 16 <- used for rom code
+    { (uint8_t *)0x3FFB0000, 0x8000, 0, 0}, //pool 15 <- can be used for BT
+    { (uint8_t *)0x3FFB8000, 0x8000, 0, 0}, //pool 14 <- can be used for BT
+    { (uint8_t *)0x3FFC0000, 0x2000, 0, 0}, //pool 10-13, mmu page 0
+    { (uint8_t *)0x3FFC2000, 0x2000, 0, 0}, //pool 10-13, mmu page 1
+    { (uint8_t *)0x3FFC4000, 0x2000, 0, 0}, //pool 10-13, mmu page 2
+    { (uint8_t *)0x3FFC6000, 0x2000, 0, 0}, //pool 10-13, mmu page 3
+    { (uint8_t *)0x3FFC8000, 0x2000, 0, 0}, //pool 10-13, mmu page 4
+    { (uint8_t *)0x3FFCA000, 0x2000, 0, 0}, //pool 10-13, mmu page 5
+    { (uint8_t *)0x3FFCC000, 0x2000, 0, 0}, //pool 10-13, mmu page 6
+    { (uint8_t *)0x3FFCE000, 0x2000, 0, 0}, //pool 10-13, mmu page 7
+    { (uint8_t *)0x3FFD0000, 0x2000, 0, 0}, //pool 10-13, mmu page 8
+    { (uint8_t *)0x3FFD2000, 0x2000, 0, 0}, //pool 10-13, mmu page 9
+    { (uint8_t *)0x3FFD4000, 0x2000, 0, 0}, //pool 10-13, mmu page 10
+    { (uint8_t *)0x3FFD6000, 0x2000, 0, 0}, //pool 10-13, mmu page 11
+    { (uint8_t *)0x3FFD8000, 0x2000, 0, 0}, //pool 10-13, mmu page 12
+    { (uint8_t *)0x3FFDA000, 0x2000, 0, 0}, //pool 10-13, mmu page 13
+    { (uint8_t *)0x3FFDC000, 0x2000, 0, 0}, //pool 10-13, mmu page 14
+    { (uint8_t *)0x3FFDE000, 0x2000, 0, 0}, //pool 10-13, mmu page 15
+    { (uint8_t *)0x3FFE0000, 0x4000, 1, 0x400BC000}, //pool 9 blk 1
+    { (uint8_t *)0x3FFE4000, 0x4000, 1, 0x400B8000}, //pool 9 blk 0
+    { (uint8_t *)0x3FFE8000, 0x8000, 1, 0x400B0000}, //pool 8 <- can be remapped to ROM, used for MAC dump
+    { (uint8_t *)0x3FFF0000, 0x8000, 1, 0x400A8000}, //pool 7 <- can be used for MAC dump
+    { (uint8_t *)0x3FFF8000, 0x4000, 1, 0x400A4000}, //pool 6 blk 1 <- can be used as trace memory
+    { (uint8_t *)0x3FFFC000, 0x4000, 1, 0x400A0000}, //pool 6 blk 0 <- can be used as trace memory
+    { (uint8_t *)0x40070000, 0x8000, 2, 0}, //pool 0
+    { (uint8_t *)0x40078000, 0x8000, 2, 0}, //pool 1
+    { (uint8_t *)0x40080000, 0x2000, 2, 0}, //pool 2-5, mmu page 0
+    { (uint8_t *)0x40082000, 0x2000, 2, 0}, //pool 2-5, mmu page 1
+    { (uint8_t *)0x40084000, 0x2000, 2, 0}, //pool 2-5, mmu page 2
+    { (uint8_t *)0x40086000, 0x2000, 2, 0}, //pool 2-5, mmu page 3
+    { (uint8_t *)0x40088000, 0x2000, 2, 0}, //pool 2-5, mmu page 4
+    { (uint8_t *)0x4008A000, 0x2000, 2, 0}, //pool 2-5, mmu page 5
+    { (uint8_t *)0x4008C000, 0x2000, 2, 0}, //pool 2-5, mmu page 6
+    { (uint8_t *)0x4008E000, 0x2000, 2, 0}, //pool 2-5, mmu page 7
+    { (uint8_t *)0x40090000, 0x2000, 2, 0}, //pool 2-5, mmu page 8
+    { (uint8_t *)0x40092000, 0x2000, 2, 0}, //pool 2-5, mmu page 9
+    { (uint8_t *)0x40094000, 0x2000, 2, 0}, //pool 2-5, mmu page 10
+    { (uint8_t *)0x40096000, 0x2000, 2, 0}, //pool 2-5, mmu page 11
+    { (uint8_t *)0x40098000, 0x2000, 2, 0}, //pool 2-5, mmu page 12
+    { (uint8_t *)0x4009A000, 0x2000, 2, 0}, //pool 2-5, mmu page 13
+    { (uint8_t *)0x4009C000, 0x2000, 2, 0}, //pool 2-5, mmu page 14
+    { (uint8_t *)0x4009E000, 0x2000, 2, 0}, //pool 2-5, mmu page 15
+    { NULL, 0, 0, 0} //end
 };


 //Modify regions array to disable the given range of memory.
 static void disable_mem_region(void *from, void *to) {
-	int i;
-	//Align from and to on word boundaries
-	from=(void*)((uint32_t)from&~3);
-	to=(void*)(((uint32_t)to+3)&~3);
-	for (i=0; regions[i].xSizeInBytes!=0; i++) {
-		void *regStart=regions[i].pucStartAddress;
-		void *regEnd=regions[i].pucStartAddress+regions[i].xSizeInBytes;
-		if (regStart>=from && regEnd<=to) {
-			//Entire region falls in the range. Disable entirely.
-			regions[i].xTag=-1;
-		} else if (regStart>=from && regEnd>to && regStart<to) {
-			//Start of the region falls in the range. Modify address/len.
-			int overlap=(uint8_t *)to-(uint8_t *)regStart;
-			regions[i].pucStartAddress+=overlap;
-			regions[i].xSizeInBytes-=overlap;
-			if (regions[i].xExecAddr) regions[i].xExecAddr+=overlap;
-		} else if (regStart<from && regEnd>from && regEnd<=to) {
-			//End of the region falls in the range. Modify length.
-			regions[i].xSizeInBytes-=(uint8_t *)regEnd-(uint8_t *)from;
-		} else if (regStart<from && regEnd>to) {
-			//Range punches a hole in the region! We do not support this.
-			ESP_EARLY_LOGE(TAG, "region %d: hole punching is not supported!", i);
-			regions[i].xTag=-1; //Just disable memory region. That'll teach them!
-		}
-	}
+    int i;
+    //Align from and to on word boundaries
+    from=(void*)((uint32_t)from&~3);
+    to=(void*)(((uint32_t)to+3)&~3);
+    for (i=0; regions[i].xSizeInBytes!=0; i++) {
+        void *regStart=regions[i].pucStartAddress;
+        void *regEnd=regions[i].pucStartAddress+regions[i].xSizeInBytes;
+        if (regStart>=from && regEnd<=to) {
+            //Entire region falls in the range. Disable entirely.
+            regions[i].xTag=-1;
+        } else if (regStart>=from && regEnd>to && regStart<to) {
+            //Start of the region falls in the range. Modify address/len.
+            int overlap=(uint8_t *)to-(uint8_t *)regStart;
+            regions[i].pucStartAddress+=overlap;
+            regions[i].xSizeInBytes-=overlap;
+            if (regions[i].xExecAddr) regions[i].xExecAddr+=overlap;
+        } else if (regStart<from && regEnd>from && regEnd<=to) {
+            //End of the region falls in the range. Modify length.
+            regions[i].xSizeInBytes-=(uint8_t *)regEnd-(uint8_t *)from;
+        } else if (regStart<from && regEnd>to) {
+            //Range punches a hole in the region! We do not support this.
+            ESP_EARLY_LOGE(TAG, "region %d: hole punching is not supported!", i);
+            regions[i].xTag=-1; //Just disable memory region. That'll teach them!
+        }
+    }
 }


@@ -170,52 +170,56 @@ ToDo: The regions are different when stuff like trace memory, BT, ... is used. M
 Same with loading of apps. Same with using SPI RAM.
 */
 void heap_alloc_caps_init() {
-	int i;
-	//Disable the bits of memory where this code is loaded.
-	disable_mem_region(&_bss_start, &_heap_start);
-	disable_mem_region((void*)0x3ffae000, (void*)0x3ffb0000); //knock out ROM data region
-	disable_mem_region((void*)0x40070000, (void*)0x40078000); //CPU0 cache region
-	disable_mem_region((void*)0x40078000, (void*)0x40080000); //CPU1 cache region
-	disable_mem_region((void*)0x40080000, (void*)0x400a0000); //pool 2-5
+    int i;
+    //Disable the bits of memory where this code is loaded.
+    disable_mem_region(&_bss_start, &_heap_start);
+    disable_mem_region((void*)0x3ffae000, (void*)0x3ffb0000); //knock out ROM data region
+    disable_mem_region((void*)0x40070000, (void*)0x40078000); //CPU0 cache region
+    disable_mem_region((void*)0x40078000, (void*)0x40080000); //CPU1 cache region
+    disable_mem_region((void*)0x40080000, (void*)0x400a0000); //pool 2-5

-	// TODO: this region should be checked, since we don't need to knock out all region finally
-	disable_mem_region((void*)0x3ffe0000, (void*)0x3ffe8000); //knock out ROM data region
+    // TODO: this region should be checked, since we don't need to knock out all region finally
+    disable_mem_region((void*)0x3ffe0000, (void*)0x3ffe8000); //knock out ROM data region

 #if CONFIG_MEMMAP_BT
-	disable_mem_region((void*)0x3ffb0000, (void*)0x3ffc0000); //knock out BT data region
+    disable_mem_region((void*)0x3ffb0000, (void*)0x3ffc0000); //knock out BT data region
 #endif

 #if CONFIG_MEMMAP_TRACEMEM
-	disable_mem_region((void*)0x3fff8000, (void*)0x40000000); //knock out trace mem region
+#if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
+    disable_mem_region((void*)0x3fff8000, (void*)0x40000000); //knock out trace mem region
+#else
+    disable_mem_region((void*)0x3fff8000, (void*)0x3fffc000); //knock out trace mem region
+#endif
 #endif

 #if 0
-	enable_spi_sram();
+    enable_spi_sram();
 #else
-	disable_mem_region((void*)0x3f800000, (void*)0x3f820000); //SPI SRAM not installed
+    disable_mem_region((void*)0x3f800000, (void*)0x3f820000); //SPI SRAM not installed
 #endif

-	//The heap allocator will treat every region given to it as separate. In order to get bigger ranges of contiguous memory,
-	//it's useful to coalesce adjacent regions that have the same tag.
+    //The heap allocator will treat every region given to it as separate. In order to get bigger ranges of contiguous memory,
+    //it's useful to coalesce adjacent regions that have the same tag.

-	for (i=1; regions[i].xSizeInBytes!=0; i++) {
-		if (regions[i].pucStartAddress == (regions[i-1].pucStartAddress + regions[i-1].xSizeInBytes) &&
-									regions[i].xTag == regions[i-1].xTag ) {
-			regions[i-1].xTag=-1;
-			regions[i].pucStartAddress=regions[i-1].pucStartAddress;
-			regions[i].xSizeInBytes+=regions[i-1].xSizeInBytes;
-		}
-	}
+    for (i=1; regions[i].xSizeInBytes!=0; i++) {
+        if (regions[i].pucStartAddress == (regions[i-1].pucStartAddress + regions[i-1].xSizeInBytes) &&
+                                    regions[i].xTag == regions[i-1].xTag ) {
+            regions[i-1].xTag=-1;
+            regions[i].pucStartAddress=regions[i-1].pucStartAddress;
+            regions[i].xSizeInBytes+=regions[i-1].xSizeInBytes;
+        }
+    }

-	ESP_EARLY_LOGI(TAG, "Initializing heap allocator:");
-	for (i=0; regions[i].xSizeInBytes!=0; i++) {
-		if (regions[i].xTag != -1) {
-		    ESP_EARLY_LOGI(TAG, "Region %02d: %08X len %08X tag %d", i,
-		            (int)regions[i].pucStartAddress, regions[i].xSizeInBytes, regions[i].xTag);
-		}
-	}
-	//Initialize the malloc implementation.
-	vPortDefineHeapRegionsTagged( regions );
+    ESP_EARLY_LOGI(TAG, "Initializing heap allocator:");
+    for (i=0; regions[i].xSizeInBytes!=0; i++) {
+        if (regions[i].xTag != -1) {
+            ESP_EARLY_LOGI(TAG, "Region %02d: %08X len %08X tag %d", i,
+                    (int)regions[i].pucStartAddress, regions[i].xSizeInBytes, regions[i].xTag);
+        }
+    }
+    //Initialize the malloc implementation.
+    vPortDefineHeapRegionsTagged( regions );
 }

 /*
@@ -223,7 +227,7 @@ Standard malloc() implementation. Will return ho-hum byte-accessible data memory
 */
 void *pvPortMalloc( size_t xWantedSize )
 {
-	return pvPortMallocCaps( xWantedSize, MALLOC_CAP_8BIT );
+    return pvPortMallocCaps( xWantedSize, MALLOC_CAP_8BIT );
 }

 /*
@@ -231,30 +235,30 @@ Routine to allocate a bit of memory with certain capabilities. caps is a bitfiel
 */
 void *pvPortMallocCaps( size_t xWantedSize, uint32_t caps ) 
 {
-	int prio;
-	int tag, j;
-	void *ret=NULL;
-	uint32_t remCaps;
-	for (prio=0; prio<NO_PRIOS; prio++) {
-		//Iterate over tag descriptors for this priority
-		for (tag=0; tagDesc[tag][prio]!=MALLOC_CAP_INVALID; tag++) {
-			if ((tagDesc[tag][prio]&caps)!=0) {
-				//Tag has at least one of the caps requested. If caps has other bits set that this prio
-				//doesn't cover, see if they're available in other prios.
-				remCaps=caps&(~tagDesc[tag][prio]); //Remaining caps to be fulfilled
-				j=prio+1;
-				while (remCaps!=0 && j<NO_PRIOS) {
-					remCaps=remCaps&(~tagDesc[tag][j]);
-					j++;
-				}
-				if (remCaps==0) {
-					//This tag can satisfy all the requested capabilities. See if we can grab some memory using it.
-					ret=pvPortMallocTagged(xWantedSize, tag);
-					if (ret!=NULL) return ret;
-				}
-			}
-		}
-	}
-	//Nothing usable found.
-	return NULL;
+    int prio;
+    int tag, j;
+    void *ret=NULL;
+    uint32_t remCaps;
+    for (prio=0; prio<NO_PRIOS; prio++) {
+        //Iterate over tag descriptors for this priority
+        for (tag=0; tagDesc[tag][prio]!=MALLOC_CAP_INVALID; tag++) {
+            if ((tagDesc[tag][prio]&caps)!=0) {
+                //Tag has at least one of the caps requested. If caps has other bits set that this prio
+                //doesn't cover, see if they're available in other prios.
+                remCaps=caps&(~tagDesc[tag][prio]); //Remaining caps to be fulfilled
+                j=prio+1;
+                while (remCaps!=0 && j<NO_PRIOS) {
+                    remCaps=remCaps&(~tagDesc[tag][j]);
+                    j++;
+                }
+                if (remCaps==0) {
+                    //This tag can satisfy all the requested capabilities. See if we can grab some memory using it.
+                    ret=pvPortMallocTagged(xWantedSize, tag);
+                    if (ret!=NULL) return ret;
+                }
+            }
+        }
+    }
+    //Nothing usable found.
+    return NULL;
 }
--- a/components/esp32/include/esp_attr.h
+++ b/components/esp32/include/esp_attr.h
@@ -20,22 +20,21 @@
 //and all variables in shared RAM. These macros can be used to redirect
 //particular functions/variables to other memory regions.

-// Forces code into IRAM instead of flash
+// Forces code into IRAM instead of flash.
 #define IRAM_ATTR __attribute__((section(".iram1")))

 // Forces data into DRAM instead of flash
 #define DRAM_ATTR __attribute__((section(".dram1")))

-// Forces code into RTC fast memory
+// Forces code into RTC fast memory. See "docs/deep-sleep-stub.rst"
 #define RTC_IRAM_ATTR __attribute__((section(".rtc.text")))

-// Forces data into RTC slow memory
+// Forces data into RTC slow memory. See "docs/deep-sleep-stub.rst"
 // Any variable marked with this attribute will keep its value
 // during a deep sleep / wake cycle.
 #define RTC_DATA_ATTR __attribute__((section(".rtc.data")))

-// Forces read-only data into RTC slow memory
-// Makes constant data available to RTC wake stubs (see esp_deepsleep.h)
+// Forces read-only data into RTC slow memory. See "docs/deep-sleep-stub.rst"
 #define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata")))

 #endif /* __ESP_ATTR_H__ */
--- a/components/esp32/include/esp_brownout.h
+++ b/components/esp32/include/esp_brownout.h
@@ -0,0 +1,21 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+#ifndef __ESP_BROWNOUT_H
+#define __ESP_BROWNOUT_H
+
+void esp_brownout_init();
+
+#endif
--- a/components/esp32/include/esp_crosscore_int.h
+++ b/components/esp32/include/esp_crosscore_int.h
@@ -0,0 +1,42 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __ESP_CROSSCORE_INT_H
+#define __ESP_CROSSCORE_INT_H
+
+
+/**
+ * Initialize the crosscore interrupt system for this CPU.
+ * This needs to be called once on every CPU that is used
+ * by FreeRTOS.
+ *
+ * If multicore FreeRTOS support is enabled, this will be
+ * called automatically by the startup code and should not
+ * be called manually.
+ */
+void esp_crosscore_int_init();
+
+
+/**
+ * Send an interrupt to a CPU indicating it should yield its
+ * currently running task in favour of a higher-priority task
+ * that presumably just woke up.
+ *
+ * This is used internally by FreeRTOS in multicore mode
+ * and should not be called by the user.
+ *
+ * @param coreID Core that should do the yielding
+ */
+void esp_crosscore_int_send_yield(int coreId);
+
+#endif
--- a/components/esp32/include/esp_deepsleep.h
+++ b/components/esp32/include/esp_deepsleep.h
@@ -54,37 +54,7 @@ void system_deep_sleep(uint64_t time_in_us);
 * to run code immediately when the chip wakes from
 * sleep.
 *
- * For example:
- * @code
- * void RTC_IRAM_ATTR esp_wake_deep_sleep(void) {
- *    esp_default_wake_deep_sleep();
- *    // Add additional functionality here
- * }
- *
- * (Implementing this function is not required for normal operation,
- * in the usual case your app will start normally when waking from
- * deep sleep.)
- *
- * esp_wake_deep_sleep() functionality is limited:
- *
- * - Runs immediately on wake, so most of the SoC is freshly reset -
- *   flash is unmapped and hardware is otherwise uninitialised.
- *
- * - Can only call functions implemented in ROM, or marked RTC_IRAM_ATTR.
- *
- * - Static variables marked RTC_DATA_ATTR will have initial values on
- *   cold boot, and maintain these values between sleep/wake cycles.
- *
- * - Read-only data should be marked RTC_RODATA_ATTR. Strings must be
- *   declared as variables also using RTC_RODATA_ATTR, like this:
- *   RTC_RODATA_ATTR const char message[] = "Hello from very early boot!\n";
- *
- * - Any other static memory will not be initialised (either to zero,
- *   or to any predefined value).
- *
- *
- * - If you implement your own stub, the first call the stub makes
-     should be to esp_default_wake_deep_sleep().
+ * See docs/deep-sleep-stub.rst for details.
 */
 void esp_wake_deep_sleep(void);

@@ -115,9 +85,7 @@ esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void);

 /* The default esp-idf-provided esp_wake_deep_sleep() stub.

-   If you replace esp_wake_deep_sleep() in your program, or use
-   esp_set_deep_sleep_wake_stub(), then it is recommended you call
-   esp_default_wake_deep_sleep() as the first function in your stub.
+   See docs/deep-sleep-stub.rst for details.
 */
 void esp_default_wake_deep_sleep(void);

--- a/components/esp32/include/esp_err.h
+++ b/components/esp32/include/esp_err.h
@@ -31,6 +31,13 @@ typedef int32_t esp_err_t;
 #define ESP_ERR_NO_MEM          0x101
 #define ESP_ERR_INVALID_ARG     0x102
 #define ESP_ERR_INVALID_STATE   0x103
+#define ESP_ERR_INVALID_SIZE    0x104
+#define ESP_ERR_NOT_FOUND       0x105
+#define ESP_ERR_NOT_SUPPORTED   0x106
+#define ESP_ERR_TIMEOUT         0x107
+
+
+#define ESP_ERR_WIFI_BASE       0x3000 /*!< Starting number of WiFi error codes */

 /**
 * Macro which can be used to check the error code,
--- a/components/esp32/include/esp_event.h
+++ b/components/esp32/include/esp_event.h
@@ -35,6 +35,10 @@ typedef enum {
    SYSTEM_EVENT_STA_DISCONNECTED,         /**< ESP32 station disconnected from AP */
    SYSTEM_EVENT_STA_AUTHMODE_CHANGE,      /**< the auth mode of AP connected by ESP32 station changed */
    SYSTEM_EVENT_STA_GOT_IP,               /**< ESP32 station got IP from connected AP */
+    SYSTEM_EVENT_STA_WPS_ER_SUCCESS,       /**< ESP32 station wps succeeds in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_FAILED,        /**< ESP32 station wps fails in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_TIMEOUT,       /**< ESP32 station wps timeout in enrollee mode */
+    SYSTEM_EVENT_STA_WPS_ER_PIN,           /**< ESP32 station wps pin code in enrollee mode */
    SYSTEM_EVENT_AP_START,                 /**< ESP32 soft-AP start */
    SYSTEM_EVENT_AP_STOP,                  /**< ESP32 soft-AP stop */
    SYSTEM_EVENT_AP_STACONNECTED,          /**< a station connected to ESP32 soft-AP */
@@ -73,6 +77,10 @@ typedef struct {
    tcpip_adapter_ip_info_t ip_info;
 } system_event_sta_got_ip_t;

+typedef struct {
+    uint8_t pin_code[8];         /**< PIN code of station in enrollee mode */
+}system_event_sta_wps_er_pin_t;
+
 typedef struct {
    uint8_t mac[6];           /**< MAC address of the station connected to ESP32 soft-AP */
    uint8_t aid;              /**< the aid that ESP32 soft-AP gives to the station connected to  */
@@ -94,6 +102,7 @@ typedef union {
    system_event_sta_scan_done_t               scan_done;          /**< ESP32 station scan (APs) done */
    system_event_sta_authmode_change_t         auth_change;        /**< the auth mode of AP ESP32 station connected to changed */
    system_event_sta_got_ip_t                  got_ip;             /**< ESP32 station got IP */
+    system_event_sta_wps_er_pin_t              sta_er_pin;         /**< ESP32 station WPS enrollee mode PIN code received */
    system_event_ap_staconnected_t             sta_connected;      /**< a station connected to ESP32 soft-AP */
    system_event_ap_stadisconnected_t          sta_disconnected;   /**< a station disconnected to ESP32 soft-AP */
    system_event_ap_probe_req_rx_t             ap_probereqrecved;  /**< ESP32 soft-AP receive probe request packet */
--- a/components/esp32/include/esp_flash_data_types.h
+++ b/components/esp32/include/esp_flash_data_types.h
@@ -0,0 +1,58 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef __ESP_BIN_TYPES_H__
+#define __ESP_BIN_TYPES_H__
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#define ESP_PARTITION_TABLE_ADDR 0x8000
+#define ESP_PARTITION_MAGIC 0x50AA
+
+/* OTA selection structure (two copies in the OTA data partition.)
+   Size of 32 bytes is friendly to flash encryption */
+typedef struct {
+    uint32_t ota_seq;
+    uint8_t  seq_label[24];
+    uint32_t crc; /* CRC32 of ota_seq field only */
+} esp_ota_select_entry_t;
+
+
+typedef struct {
+    uint32_t offset;
+    uint32_t size;
+} esp_partition_pos_t;
+
+/* Structure which describes the layout of partition table entry.
+ * See docs/partition_tables.rst for more information about individual fields.
+ */
+typedef struct {
+	uint16_t magic;
+	uint8_t  type;
+    uint8_t  subtype;
+    esp_partition_pos_t pos;
+	uint8_t  label[16];
+    uint8_t  reserved[4];
+} esp_partition_info_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif //__ESP_BIN_TYPES_H__
--- a/components/esp32/include/esp_freertos_hooks.h
+++ b/components/esp32/include/esp_freertos_hooks.h
@@ -0,0 +1,83 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_FREERTOS_HOOKS_H__
+#define __ESP_FREERTOS_HOOKS_H__
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/*
+ Definitions for the tickhook and idlehook callbacks
+*/
+typedef bool (*esp_freertos_idle_cb_t)();
+typedef void (*esp_freertos_tick_cb_t)();
+
+/**
+  * @brief  Register a callback to be called on the freertos idle hook
+  *         The callback should return true if it's okay for the core to
+  *         sleep until an interrupt (or FreeRTOS tick) happens and false
+  *         if it should be called again as fast as possible.
+  *
+  * @warning Idle callbacks MUST NOT, UNDER ANY CIRCUMSTANCES, CALL 
+  *          A FUNCTION THAT MIGHT BLOCK.
+  *
+  * @param  esp_freertos_idle_cb_t new_idle_cb : Callback to be called
+  *
+  * @return ESP_OK : Callback registered
+  * @return ESP_ERR_NO_MEM : No more space to register hook
+  */
+esp_err_t esp_register_freertos_idle_hook(esp_freertos_idle_cb_t new_idle_cb);
+
+/**
+  * @brief  Register a callback to be called on the freertos tick hook
+  *
+  * @param  esp_freertos_tick_cb_t new_tick_cb : Callback to be called
+  *
+  * @return ESP_OK : Callback registered
+  * @return ESP_ERR_NO_MEM : No more space to register hook
+  */
+esp_err_t esp_register_freertos_tick_hook(esp_freertos_tick_cb_t tick_cb);
+
+
+/**
+  * @brief  Unregister an idle callback registered earlier
+  *
+  * @param  esp_freertos_idle_cb_t new_idle_cb : Callback to be unregistered
+  *
+  * @return void
+  */
+void esp_deregister_freertos_idle_hook(esp_freertos_idle_cb_t old_idle_cb);
+
+
+/**
+  * @brief  Unregister a tick callback registered earlier
+  *
+  * @param  esp_freertos_idle_cb_t new_idle_cb : Callback to be unregistered
+  *
+  * @return void
+  */
+void esp_deregister_freertos_tick_hook(esp_freertos_tick_cb_t old_tick_cb);
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif
--- a/components/esp32/include/esp_gdbstub.h
+++ b/components/esp32/include/esp_gdbstub.h
@@ -0,0 +1,22 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef GDBSTUB_H
+#define GDBSTUB_H
+
+#include <xtensa/config/core.h>
+#include "freertos/xtensa_api.h"
+
+void esp_gdbstub_panic_handler(XtExcFrame *frame);
+
+#endif
--- a/components/esp32/include/esp_heap_alloc_caps.h
+++ b/components/esp32/include/esp_heap_alloc_caps.h
--- a/components/esp32/include/esp_int_wdt.h
+++ b/components/esp32/include/esp_int_wdt.h
@@ -0,0 +1,60 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_INT_WDT_H
+#define __ESP_INT_WDT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** @addtogroup Watchdog_APIs
+  * @{
+  */
+
+/*
+This routine enables a watchdog to catch instances of processes disabling
+interrupts for too long, or code within interrupt handlers taking too long. 
+It does this by setting up a watchdog which gets fed from the FreeRTOS
+task switch interrupt. When this watchdog times out, initially it will call
+a high-level interrupt routine that will panic FreeRTOS in order to allow
+for forensic examination of the state of the CPU. When this interrupt 
+handler is not called and the watchdog times out a second time, it will 
+reset the SoC.
+
+This uses the TIMERG1 WDT.
+*/
+
+
+/**
+  * @brief  Initialize the interrupt watchdog. This is called in the init code if
+  *         the interrupt watchdog is enabled in menuconfig.
+  *
+  * @param  null
+  *
+  * @return null
+  */
+void esp_int_wdt_init();
+
+
+/**
+  * @}
+  */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
--- a/components/esp32/include/esp_panic.h
+++ b/components/esp32/include/esp_panic.h
@@ -0,0 +1,21 @@
+#ifndef PANIC_H
+#define PANIC_H
+
+
+#define PANIC_RSN_NONE 0
+#define PANIC_RSN_DEBUGEXCEPTION 1
+#define PANIC_RSN_DOUBLEEXCEPTION 2
+#define PANIC_RSN_KERNELEXCEPTION 3
+#define PANIC_RSN_COPROCEXCEPTION 4
+#define PANIC_RSN_INTWDT_CPU0 5
+#define PANIC_RSN_INTWDT_CPU1 6
+#define PANIC_RSN_MAX 6
+
+
+#ifndef __ASSEMBLER__
+
+void esp_set_breakpoint_if_jtag(void *fn);
+
+#endif
+
+#endif
--- a/components/esp32/include/esp_system.h
+++ b/components/esp32/include/esp_system.h
@@ -32,6 +32,13 @@ extern "C" {
  * @{
  */

+/**
+  * @attention  application don't need to call this function anymore. It do nothing and will
+  *             be removed in future version.
+  */
+void system_init(void) __attribute__ ((deprecated));
+
+
 /**
  * @brief  Get information of the SDK version.
  *
@@ -169,8 +176,6 @@ bool system_rtc_mem_write(uint16_t dst, const void *src, uint16_t n);
 esp_err_t system_efuse_read_mac(uint8_t mac[6]);


-void system_init(void);
-
 /**
  * @}
  */
--- a/components/esp32/include/esp_task_wdt.h
+++ b/components/esp32/include/esp_task_wdt.h
@@ -0,0 +1,83 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_TASK_WDT_H
+#define __ESP_TASK_WDT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+/** \defgroup Watchdog_APIs Watchdog APIs
+  * @brief Watchdog APIs
+  */
+
+/** @addtogroup Watchdog_APIs
+  * @{
+  */
+
+/*
+This routine enables a more general-purpose task watchdog: tasks can individually
+feed the watchdog and the watchdog will bark if one or more tasks haven't fed the
+watchdog within the specified time. Optionally, the idle tasks can also configured
+to feed the watchdog in a similar fashion, to detect CPU starvation.
+
+This uses the TIMERG0 WDT.
+*/
+
+
+/**
+  * @brief  Initialize the task watchdog. This is called in the init code, if the
+  *         task watchdog is enabled in menuconfig.
+  *
+  * @param  null
+  *
+  * @return null
+  */
+void esp_task_wdt_init();
+
+/**
+  * @brief  Feed the watchdog. After the first feeding session, the watchdog will expect the calling
+  *         task to keep feeding the watchdog until task_wdt_delete() is called.
+  *
+  * @param  null
+  *
+  * @return null
+  */
+
+void esp_task_wdt_feed();
+
+
+/**
+  * @brief  Delete the watchdog for the current task.
+  *
+  * @param  null
+  *
+  * @return null
+  */
+void esp_task_wdt_delete();
+
+/**
+  * @}
+  */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+
+#endif
--- a/components/esp32/include/esp_wifi.h
+++ b/components/esp32/include/esp_wifi.h
@@ -70,6 +70,24 @@
 extern "C" {
 #endif

+#define ESP_ERR_WIFI_OK          ESP_OK                    /*!< No error */
+#define ESP_ERR_WIFI_FAIL        ESP_FAIL                  /*!< General fail code */
+#define ESP_ERR_WIFI_NO_MEM      ESP_ERR_NO_MEM            /*!< Out of memory */
+#define ESP_ERR_WIFI_ARG         ESP_ERR_INVALID_ARG       /*!< Invalid argument */
+#define ESP_ERR_WIFI_NOT_SUPPORT ESP_ERR_NOT_SUPPORTED     /*!< Indicates that API is not supported yet */
+
+#define ESP_ERR_WIFI_NOT_INIT    (ESP_ERR_WIFI_BASE + 1)   /*!< WiFi driver is not installed by esp_wifi_init */
+#define ESP_ERR_WIFI_NOT_START   (ESP_ERR_WIFI_BASE + 2)   /*!< WiFi driver is not started by esp_wifi_start */
+#define ESP_ERR_WIFI_IF          (ESP_ERR_WIFI_BASE + 3)   /*!< WiFi interface error */
+#define ESP_ERR_WIFI_MODE        (ESP_ERR_WIFI_BASE + 4)   /*!< WiFi mode error */
+#define ESP_ERR_WIFI_STATE       (ESP_ERR_WIFI_BASE + 5)   /*!< WiFi internal state error */
+#define ESP_ERR_WIFI_CONN        (ESP_ERR_WIFI_BASE + 6)   /*!< WiFi internal control block of station or soft-AP error */
+#define ESP_ERR_WIFI_NVS         (ESP_ERR_WIFI_BASE + 7)   /*!< WiFi internal NVS module error */
+#define ESP_ERR_WIFI_MAC         (ESP_ERR_WIFI_BASE + 8)   /*!< MAC address is invalid */
+#define ESP_ERR_WIFI_SSID        (ESP_ERR_WIFI_BASE + 9)   /*!< SSID is invalid */
+#define ESP_ERR_WIFI_PASSWORD    (ESP_ERR_WIFI_BASE + 10)  /*!< Passord is invalid */
+#define ESP_ERR_WIFI_TIMEOUT     (ESP_ERR_WIFI_BASE + 11)  /*!< Timeout error */
+
 typedef struct {
    system_event_handler_t event_handler;  /**< WiFi event handler */
 } wifi_init_config_t;
@@ -92,8 +110,10 @@ typedef struct {
  *
  * @param  wifi_init_config_t *config : provide WiFi init configuration
  *
-  * @return ESP_OK : succeed
-  * @return others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NO_MEM : out of memory
+  *    - others : refer to error code esp_err.h 
  */
 esp_err_t esp_wifi_init(wifi_init_config_t *config);

@@ -104,7 +124,6 @@ esp_err_t esp_wifi_init(wifi_init_config_t *config);
  * @attention 1. This API should be called if you want to remove WiFi driver from the system
  *
  * @return ESP_OK : succeed
-  * @return others : fail
  */
 esp_err_t esp_wifi_deinit(void);

@@ -116,8 +135,11 @@ esp_err_t esp_wifi_deinit(void);
  *
  * @param     wifi_mode_t mode : WiFi operating modes:
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_set_mode(wifi_mode_t mode);

@@ -126,8 +148,10 @@ esp_err_t esp_wifi_set_mode(wifi_mode_t mode);
  *
  * @param  wifi_mode_t *mode : store current WiFi mode
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_get_mode(wifi_mode_t *mode);

@@ -139,8 +163,13 @@ esp_err_t esp_wifi_get_mode(wifi_mode_t *mode);
  *
  * @param  null
  *
-  * @return ESP_OK : succeed
-  * @return others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_NO_MEM : out of memory
+  *    - ESP_ERR_WIFI_CONN : WiFi internal error, station or soft-AP control block wrong
+  *    - ESP_ERR_WIFI_FAIL : other WiFi internal errors
  */
 esp_err_t esp_wifi_start(void);

@@ -152,8 +181,9 @@ esp_err_t esp_wifi_start(void);
  *
  * @param  null
  *
-  * @return ESP_OK : succeed
-  * @return others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
  */
 esp_err_t esp_wifi_stop(void);

@@ -165,8 +195,12 @@ esp_err_t esp_wifi_stop(void);
  *
  * @param     null
  *
-  * @return ESP_OK : succeed
-  * @return others : fail
+  * @return 
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_CONN : WiFi internal error, station or soft-AP control block wrong
+  *    - ESP_ERR_WIFI_SSID : SSID of AP which station connects is invalid
  */
 esp_err_t esp_wifi_connect(void);

@@ -175,8 +209,11 @@ esp_err_t esp_wifi_connect(void);
  *
  * @param     null
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_FAIL : other WiFi internal errors
  */
 esp_err_t esp_wifi_disconnect(void);

@@ -185,20 +222,25 @@ esp_err_t esp_wifi_disconnect(void);
  *
  * @param     null
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - others : fail
  */
 esp_err_t esp_wifi_clear_fast_connect(void);

 /**
-  * @brief     Kick the all station or associated id equals to aid
+  * @brief     deauthenticate all stations or associated id equals to aid
  *
-  * @param     uint16_t aid : when aid is 0, kick all stations, otherwise kick station whose associated id is aid
+  * @param     uint16_t aid : when aid is 0, deauthenticate all stations, otherwise deauthenticate station whose associated id is aid
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_MODE : WiFi mode is wrong
  */
-esp_err_t esp_wifi_kick_station(uint16_t aid);
+esp_err_t esp_wifi_deauth_sta(uint16_t aid);

 /**
  * @brief     Scan all available APs.
@@ -211,8 +253,12 @@ esp_err_t esp_wifi_kick_station(uint16_t aid);
  * @param     bool block : if block is true, this API will block the caller until the scan is done, otherwise
  *                         it will return immediately
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_TIMEOUT : blocking scan is timeout
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_scan_start(wifi_scan_config_t *conf, bool block);

@@ -220,8 +266,10 @@ esp_err_t esp_wifi_scan_start(wifi_scan_config_t *conf, bool block);
  * @brief     Stop the scan in process
  *
  * @param     null
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
  */
 esp_err_t esp_wifi_scan_stop(void);

@@ -232,30 +280,48 @@ esp_err_t esp_wifi_scan_stop(void);
  *
  * @attention This API can only be called when the scan is completed, otherwise it may get wrong value
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
-esp_err_t esp_wifi_get_ap_num(uint16_t *number);
+esp_err_t esp_wifi_scan_get_ap_num(uint16_t *number);

 /**
  * @brief     Get AP list found in last scan
  *
-  * @param     uint16_t *number : as input param, it stores max AP number ap_list can hold, as output param, it store
+  * @param     uint16_t *number : as input param, it stores max AP number ap_records can hold, as output param, it store
                                  the actual AP number this API returns
-  * @param     wifi_ap_list_t *ap_list : a list to hold the found APs
+  * @param     wifi_ap_record_t *ap_records: wifi_ap_record_t array to hold the found APs
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_NOT_START : WiFi is not started by esp_wifi_start
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_NO_MEM : out of memory
  */
-esp_err_t esp_wifi_get_ap_list(uint16_t *number, wifi_ap_list_t *ap_list);
+esp_err_t esp_wifi_scan_get_ap_records(uint16_t *number, wifi_ap_record_t *ap_records);
+
+
+/**
+  * @brief     Get information of AP associated with ESP32 station
+  *
+  * @param     wifi_ap_record_t *ap_info: the wifi_ap_record_t to hold station assocated AP
+  *
+  * @return
+  *    - ESP_OK : succeed
+  *    - others : fail
+  */
+esp_err_t esp_wifi_sta_get_ap_info(wifi_ap_record_t *ap_info);

 /**
  * @brief     Set current power save type
  *
  * @param     wifi_ps_type_t type : power save type
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return    ESP_ERR_WIFI_NOT_SUPPORT : not support yet
  */
 esp_err_t esp_wifi_set_ps(wifi_ps_type_t type);

@@ -264,8 +330,7 @@ esp_err_t esp_wifi_set_ps(wifi_ps_type_t type);
  *
  * @param     wifi_ps_type_t *type : store current power save type
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return    ESP_ERR_WIFI_NOT_SUPPORT : not support yet
  */
 esp_err_t esp_wifi_get_ps(wifi_ps_type_t *type);

@@ -278,8 +343,11 @@ esp_err_t esp_wifi_get_ps(wifi_ps_type_t *type);
  * @param     wifi_interface_t ifx : interfaces
  * @param     uint8_t protocol : WiFi protocol bitmap
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - others : refer to erro code in esp_err.h
  */
 esp_err_t esp_wifi_set_protocol(wifi_interface_t ifx, uint8_t protocol_bitmap);

@@ -289,8 +357,12 @@ esp_err_t esp_wifi_set_protocol(wifi_interface_t ifx, uint8_t protocol_bitmap);
  * @param     wifi_interface_t ifx : interfaces
  * @param     uint8_t protocol : store current WiFi protocol bitmap of interface ifx
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_get_protocol(wifi_interface_t ifx, uint8_t *protocol_bitmap);

@@ -303,8 +375,12 @@ esp_err_t esp_wifi_get_protocol(wifi_interface_t ifx, uint8_t *protocol_bitmap);
  * @param     wifi_interface_t ifx : interface to be configured
  * @param     wifi_bandwidth_t bw : bandwidth
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_set_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t bw);

@@ -316,8 +392,11 @@ esp_err_t esp_wifi_set_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t bw);
  * @param     wifi_interface_t ifx : interface to be configured
  * @param     wifi_bandwidth_t *bw : store bandwidth  of interface ifx
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_get_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t *bw);

@@ -329,8 +408,11 @@ esp_err_t esp_wifi_get_bandwidth(wifi_interface_t ifx, wifi_bandwidth_t *bw);
  * @param     uint8_t primary : for HT20, primary is the channel number, for HT40, primary is the primary channel
  * @param     wifi_second_chan_t second : for HT20, second is ignored, for HT40, second is the second channel
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_set_channel(uint8_t primary, wifi_second_chan_t second);

@@ -342,8 +424,10 @@ esp_err_t esp_wifi_set_channel(uint8_t primary, wifi_second_chan_t second);
  * @param     uint8_t *primary : store current primary channel
  * @param     wifi_second_chan_t *second : store current second channel
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_get_channel(uint8_t *primary, wifi_second_chan_t *second);

@@ -353,8 +437,11 @@ esp_err_t esp_wifi_get_channel(uint8_t *primary, wifi_second_chan_t *second);
  *
  * @param     wifi_country_t country : country type
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_set_country(wifi_country_t country);

@@ -363,8 +450,10 @@ esp_err_t esp_wifi_set_country(wifi_country_t country);
  *
  * @param     wifi_country_t country : store current country
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_get_country(wifi_country_t *country);

@@ -379,8 +468,14 @@ esp_err_t esp_wifi_get_country(wifi_country_t *country);
  * @param     wifi_interface_t ifx : interface
  * @param     uint8 mac[6]: the MAC address.
  *
-  * @return    true  : succeed
-  * @return    false : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - ESP_ERR_WIFI_MAC : invalid mac address
+  *    - ESP_ERR_WIFI_MODE : WiFi mode is wrong
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_set_mac(wifi_interface_t ifx, uint8_t mac[6]);

@@ -389,8 +484,11 @@ esp_err_t esp_wifi_set_mac(wifi_interface_t ifx, uint8_t mac[6]);
  *
  * @param     uint8_t mac[6] : store mac of this interface ifx
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_IF : invalid interface
  */
 esp_err_t esp_wifi_get_mac(wifi_interface_t ifx, uint8_t mac[6]);

@@ -402,8 +500,7 @@ esp_err_t esp_wifi_get_mac(wifi_interface_t ifx, uint8_t mac[6]);
  * @param void *buf : the data received
  * @param uint16_t len : data length
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return    none
  */
 typedef void (* wifi_promiscuous_cb_t)(void *buf, uint16_t len);

@@ -414,8 +511,9 @@ typedef void (* wifi_promiscuous_cb_t)(void *buf, uint16_t len);
  *
  * @param wifi_promiscuous_cb_t cb : callback
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
  */
 esp_err_t esp_wifi_set_promiscuous_rx_cb(wifi_promiscuous_cb_t cb);

@@ -424,8 +522,9 @@ esp_err_t esp_wifi_set_promiscuous_rx_cb(wifi_promiscuous_cb_t cb);
  *
  * @param     bool promiscuous : false - disable / true - enable
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
  */
 esp_err_t esp_wifi_set_promiscuous(bool en);

@@ -434,8 +533,10 @@ esp_err_t esp_wifi_set_promiscuous(bool en);
  *
  * @param     bool *enable : store the current status of promiscuous mode
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT  : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_get_promiscuous(bool *en);

@@ -450,8 +551,15 @@ esp_err_t esp_wifi_get_promiscuous(bool *en);
  * @param     wifi_interface_t ifx : interface
  * @param     wifi_config_t *conf : station or soft-AP configuration
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_IF : invalid interface
+  *    - ESP_ERR_WIFI_MODE : invalid mode
+  *    - ESP_ERR_WIFI_PASSWORD : invalid password
+  *    - ESP_ERR_WIFI_NVS : WiFi internal NVS error
+  *    - others : refer to the erro code in esp_err.h
  */
 esp_err_t esp_wifi_set_config(wifi_interface_t ifx, wifi_config_t *conf);

@@ -461,8 +569,11 @@ esp_err_t esp_wifi_set_config(wifi_interface_t ifx, wifi_config_t *conf);
  * @param     wifi_interface_t ifx : interface
  * @param     wifi_config_t *conf : station or soft-AP configuration
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_IF : invalid interface
  */
 esp_err_t esp_wifi_get_config(wifi_interface_t ifx, wifi_config_t *conf);

@@ -471,14 +582,17 @@ esp_err_t esp_wifi_get_config(wifi_interface_t ifx, wifi_config_t *conf);
  *
  * @attention SSC only API
  *
-  * @param     struct station_info **station :  station list
+  * @param     wifi_sta_list_t *sta:  station list
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_MODE : WiFi mode is wrong
+  *    - ESP_ERR_WIFI_CONN : WiFi internal error, the station/soft-AP control block is invalid
  */
-esp_err_t esp_wifi_get_station_list(struct station_info **station);
+esp_err_t esp_wifi_ap_get_sta_list(wifi_sta_list_t *sta);

-esp_err_t esp_wifi_free_station_list(void);

 /**
  * @brief     Set the WiFi API configuration storage type
@@ -487,42 +601,24 @@ esp_err_t esp_wifi_free_station_list(void);
  *
  * @param     wifi_storage_t storage : storage type
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *   - ESP_OK : succeed
+  *   - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *   - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_set_storage(wifi_storage_t storage);

-/**
-  * @brief     The WiFi RX callback function
-  *
-  *            Each time the WiFi need to forward the packets to high layer, the callback function will be called
-  *
-  */
-typedef esp_err_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void *eb);
-
-/**
-  * @brief     Set the WiFi RX callback
-  *
-  * @attention 1. Currently we support only one RX callback for each interface
-  *
-  * @param     wifi_interface_t ifx : interface
-  * @param     wifi_rxcb_t fn : WiFi RX callback
-  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
-  */
-esp_err_t esp_wifi_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn);
-
 /**
  * @brief     Set auto connect
  *            The default value is true
  *
-  * @attention 1.
-  *
  * @param     bool en : true - enable auto connect / false - disable auto connect
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_MODE : WiFi internal error, the station/soft-AP control block is invalid
+  *    - others : refer to error code in esp_err.h
  */
 esp_err_t esp_wifi_set_auto_connect(bool en);

@@ -531,8 +627,10 @@ esp_err_t esp_wifi_set_auto_connect(bool en);
  *
  * @param     bool *en : store current auto connect configuration
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
  */
 esp_err_t esp_wifi_get_auto_connect(bool *en);

@@ -549,8 +647,11 @@ esp_err_t esp_wifi_get_auto_connect(bool *en);
                                    1 - WIFI_VND_IE_ID_1
  * @param     uint8_t *vnd_ie : pointer to a vendor specific element
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
+  *    - ESP_ERR_WIFI_ARG : invalid argument
+  *    - ESP_ERR_WIFI_NO_MEM : out of memory
  */
 esp_err_t esp_wifi_set_vendor_ie(bool enable, wifi_vendor_ie_type_t type, wifi_vendor_ie_id_t idx, uint8_t *vnd_ie);

@@ -574,8 +675,9 @@ typedef void (*esp_vendor_ie_cb_t) (void *ctx, wifi_vendor_ie_type_t type, const
  * @param     esp_vendor_ie_cb_t cb : callback function
  * @param     void *ctx : reserved
  *
-  * @return    ESP_OK : succeed
-  * @return    others : fail
+  * @return
+  *    - ESP_OK : succeed
+  *    - ESP_ERR_WIFI_NOT_INIT : WiFi is not initialized by eps_wifi_init
  */
 esp_err_t esp_wifi_set_vendor_ie_cb(esp_vendor_ie_cb_t cb, void *ctx);

--- a/components/esp32/include/esp_wifi_internal.h
+++ b/components/esp32/include/esp_wifi_internal.h
@@ -0,0 +1,112 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+/*
+ * All the APIs declared here are internal only APIs, it can only be used by 
+ * espressif internal modules, such as SSC, LWIP, TCPIP adapter etc, espressif 
+ * customers are not recommended to use them.
+ *
+ * If someone really want to use specified APIs declared in here, please contact
+ * espressif AE/developer to make sure you know the limitations or risk of 
+ * the API, otherwise you may get unexpected behavior!!!
+ *
+ */
+
+
+#ifndef __ESP_WIFI_INTERNAL_H__
+#define __ESP_WIFI_INTERNAL_H__
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/queue.h"
+#include "rom/queue.h"
+#include "esp_err.h"
+#include "esp_wifi_types.h"
+#include "esp_event.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief  get whether the wifi driver is allowed to transmit data or not
+  *
+  * @param  none
+  *
+  * @return    true  : upper layer should stop to transmit data to wifi driver
+  * @return    false : upper layer can transmit data to wifi driver
+  */
+bool esp_wifi_internal_tx_is_stop(void);
+
+/**
+  * @brief  free the rx buffer which allocated by wifi driver
+  *
+  * @param  void* buffer: rx buffer pointer
+  *
+  * @return    nonoe
+  */
+void esp_wifi_internal_free_rx_buffer(void* buffer);
+
+/**
+  * @brief  transmit the buffer via wifi driver
+  *
+  * @param  wifi_interface_t wifi_if : wifi interface id
+  * @param  void *buffer : the buffer to be tansmit
+  * @param  u16_t len : the length of buffer
+  *
+  * @return
+  *    - ERR_OK  : Successfully transmit the buffer to wifi driver
+  *    - ERR_MEM : Out of memory
+  *    - ERR_IF : WiFi driver error
+  *    - ERR_ARG : Invalid argument
+  */
+int esp_wifi_internal_tx(wifi_interface_t wifi_if, void *buffer, u16_t len);
+
+/**
+  * @brief     The WiFi RX callback function
+  *
+  *            Each time the WiFi need to forward the packets to high layer, the callback function will be called
+  *
+  */
+typedef esp_err_t (*wifi_rxcb_t)(void *buffer, uint16_t len, void *eb);
+
+/**
+  * @brief     Set the WiFi RX callback
+  *
+  * @attention 1. Currently we support only one RX callback for each interface
+  *
+  * @param     wifi_interface_t ifx : interface
+  * @param     wifi_rxcb_t fn : WiFi RX callback
+  *
+  * @return    ESP_OK : succeed
+  * @return    others : fail
+  */
+esp_err_t esp_wifi_internal_reg_rxcb(wifi_interface_t ifx, wifi_rxcb_t fn);
+
+/**
+  * @brief     Notify WIFI driver that the station got ip successfully
+  *
+  * @param     none
+  *
+  * @return    ESP_OK : succeed
+  * @return    others : fail
+  */
+esp_err_t esp_wifi_internal_set_sta_ip(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WIFI_H__ */
--- a/components/esp32/include/esp_wifi_types.h
+++ b/components/esp32/include/esp_wifi_types.h
@@ -109,7 +109,7 @@ typedef struct {
    wifi_second_chan_t second;            /**< second channel of AP */
    int8_t  rssi;                         /**< signal strength of AP */
    wifi_auth_mode_t authmode;            /**< authmode of AP */
-} wifi_ap_list_t;
+} wifi_ap_record_t;

 typedef enum {
    WIFI_PS_NONE,    /**< No power save */
@@ -150,10 +150,15 @@ typedef union {
    wifi_sta_config_t sta; /**< configuration of STA */
 } wifi_config_t;

-struct station_info {
-    STAILQ_ENTRY(station_info) next;
-    uint8_t bssid[6];
-};
+typedef struct {
+    uint8_t mac[6];  /**< mac address of sta that associated with ESP32 soft-AP */
+}wifi_sta_info_t;
+
+#define ESP_WIFI_MAX_CONN_NUM  (10)       /**< max number of stations which can connect to ESP32 soft-AP */
+typedef struct {
+    wifi_sta_info_t sta[ESP_WIFI_MAX_CONN_NUM]; /**< station list */
+    int       num; /**< number of station that associated with ESP32 soft-AP */
+}wifi_sta_list_t;

 typedef enum {
    WIFI_STORAGE_FLASH,  /**< all configuration will strore in both memory and flash */
--- a/components/esp32/include/esp_wps.h
+++ b/components/esp32/include/esp_wps.h
@@ -0,0 +1,111 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef __ESP_WPS_H__
+#define __ESP_WPS_H__
+
+#include <stdbool.h>
+#include "esp_err.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** \defgroup WiFi_APIs WiFi Related APIs
+  * @brief WiFi APIs
+  */
+
+/** @addtogroup WiFi_APIs
+  * @{
+  */
+
+/** \defgroup WPS_APIs  WPS APIs
+  * @brief ESP32 WPS APIs
+  *
+  * WPS can only be used when ESP32 station is enabled.
+  *
+  */
+
+/** @addtogroup WPS_APIs
+  * @{
+  */
+
+#define ESP_ERR_WIFI_REGISTRAR   (ESP_ERR_WIFI_BASE + 51)  /*!< WPS registrar is not supported */
+#define ESP_ERR_WIFI_WPS_TYPE    (ESP_ERR_WIFI_BASE + 52)  /*!< WPS type error */
+#define ESP_ERR_WIFI_WPS_SM      (ESP_ERR_WIFI_BASE + 53)  /*!< WPS state machine is not initialized */
+
+typedef enum wps_type {
+    WPS_TYPE_DISABLE = 0,
+    WPS_TYPE_PBC,
+    WPS_TYPE_PIN,
+    WPS_TYPE_MAX,
+} wps_type_t;
+
+/**
+  * @brief     Enable Wi-Fi WPS function.
+  *
+  * @attention WPS can only be used when ESP32 station is enabled.
+  *
+  * @param     wps_type_t wps_type : WPS type, so far only WPS_TYPE_PBC and WPS_TYPE_PIN is supported
+  *
+  * @return    
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WIFI_WPS_TYPE : wps type is invalid
+  *          - ESP_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on
+  *          - ESP_ERR_WIFI_FAIL : wps initialization fails
+  */
+esp_err_t esp_wifi_wps_enable(wps_type_t wps_type);
+
+/**
+  * @brief  Disable Wi-Fi WPS function and release resource it taken.
+  *
+  * @param  null
+  *
+  * @return    
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on
+  */
+esp_err_t esp_wifi_wps_disable(void);
+
+/**
+  * @brief     WPS starts to work.
+  *
+  * @attention WPS can only be used when ESP32 station is enabled.
+  *
+  * @param     timeout_ms : maximum blocking time before API return.
+  *          - 0 : non-blocking
+  *          - 1~120000 : blocking time (not supported in IDF v1.0)
+  *
+  * @return    
+  *          - ESP_OK : succeed
+  *          - ESP_ERR_WIFI_WPS_TYPE : wps type is invalid
+  *          - ESP_ERR_WIFI_WPS_MODE : wifi is not in station mode or sniffer mode is on
+  *          - ESP_ERR_WIFI_WPS_SM : wps state machine is not initialized
+  *          - ESP_ERR_WIFI_FAIL : wps initialization fails
+  */
+esp_err_t esp_wifi_wps_start(int timeout_ms);
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __ESP_WPS_H__ */
--- a/components/esp32/include/heap_alloc_caps.h
+++ b/components/esp32/include/heap_alloc_caps.h
@@ -0,0 +1,34 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#ifndef HEAP_ALLOC_CAPS_H
+#define HEAP_ALLOC_CAPS_H
+
+#define MALLOC_CAP_EXEC				(1<<0)	//Memory must be able to run executable code
+#define MALLOC_CAP_32BIT			(1<<1)	//Memory must allow for aligned 32-bit data accesses
+#define MALLOC_CAP_8BIT				(1<<2)	//Memory must allow for 8/16/...-bit data accesses
+#define MALLOC_CAP_DMA				(1<<3)	//Memory must be able to accessed by DMA
+#define MALLOC_CAP_PID2				(1<<4)	//Memory must be mapped to PID2 memory space
+#define MALLOC_CAP_PID3				(1<<5)	//Memory must be mapped to PID3 memory space
+#define MALLOC_CAP_PID4				(1<<6)	//Memory must be mapped to PID4 memory space
+#define MALLOC_CAP_PID5				(1<<7)	//Memory must be mapped to PID5 memory space
+#define MALLOC_CAP_PID6				(1<<8)	//Memory must be mapped to PID6 memory space
+#define MALLOC_CAP_PID7				(1<<9)	//Memory must be mapped to PID7 memory space
+#define MALLOC_CAP_SPISRAM			(1<<10)	//Memory must be in SPI SRAM
+#define MALLOC_CAP_INVALID			(1<<31)	//Memory can't be used / list end marker
+
+
+void heap_alloc_caps_init();
+void *pvPortMallocCaps(size_t xWantedSize, uint32_t caps);
+
+#endif
--- a/components/esp32/include/rom/secure_boot.h
+++ b/components/esp32/include/rom/secure_boot.h
@@ -25,7 +25,7 @@ void ets_secure_boot_start(void);

 void ets_secure_boot_finish(void);

-void ets_secure_boot_hash(uint32_t *buf);
+void ets_secure_boot_hash(const uint32_t *buf);

 void ets_secure_boot_obtain(void);

--- a/components/esp32/include/rom/spi_flash.h
+++ b/components/esp32/include/rom/spi_flash.h
@@ -218,7 +218,7 @@ void SelectSpiFunction(uint32_t ishspi);
 void spi_flash_attach(uint32_t ishspi, bool legacy);

 /**
-  * @brief SPI Read Flash status register. We use CMD 0x05.
+  * @brief SPI Read Flash status register. We use CMD 0x05 (RDSR).
  *    Please do not call this function in SDK.
  *
  * @param  SpiFlashChip *spi : The information for Flash, which is exported from ld file.
@@ -232,7 +232,7 @@ void spi_flash_attach(uint32_t ishspi, bool legacy);
 SpiFlashOpResult SPI_read_status(SpiFlashChip *spi, uint32_t *status);

 /**
-  * @brief SPI Read Flash status register high 16 bit. We use CMD 0x35.
+  * @brief SPI Read Flash status register bits 8-15. We use CMD 0x35 (RDSR2).
  *        Please do not call this function in SDK.
  *
  * @param  SpiFlashChip *spi : The information for Flash, which is exported from ld file.
@@ -243,7 +243,7 @@ SpiFlashOpResult SPI_read_status(SpiFlashChip *spi, uint32_t *status);
  *         SPI_FLASH_RESULT_ERR : read error.
  *         SPI_FLASH_RESULT_TIMEOUT : read timeout.
  */
-SpiFlashOpResult SPI_read_status_high(SpiFlashChip *spi, uint32_t *status);
+SpiFlashOpResult SPI_read_status_high(uint32_t *status);

 /**
  * @brief Write status to Falsh status register.
@@ -503,6 +503,12 @@ void SPI_Write_Encrypt_Disable(void);
  */
 SpiFlashOpResult SPI_Encrypt_Write(uint32_t flash_addr, uint32_t *data, uint32_t len);

+
+/** @brief Global SpiFlashChip structure used by ROM functions
+ *
+ */
+extern SpiFlashChip g_rom_flashchip;
+
 /**
  * @}
  */
--- a/components/esp32/include/soc/cpu.h
+++ b/components/esp32/include/soc/cpu.h
@@ -15,6 +15,9 @@
 #ifndef _SOC_CPU_H
 #define _SOC_CPU_H

+#include <stdint.h>
+#include <stdbool.h>
+#include <stddef.h>
 #include "xtensa/corebits.h"

 /* C macros for xtensa special register read/write/exchange */
--- a/components/esp32/include/soc/dport_reg.h
+++ b/components/esp32/include/soc/dport_reg.h
@@ -3830,6 +3830,11 @@
 #define DPORT_DATE_S  0
 #define DPORT_DPORT_DATE_VERSION 0x1605190

+/* Flash MMU table for PRO CPU */
+#define DPORT_PRO_FLASH_MMU_TABLE ((volatile uint32_t*) 0x3FF10000)
+
+/* Flash MMU table for APP CPU */
+#define DPORT_APP_FLASH_MMU_TABLE ((volatile uint32_t*) 0x3FF12000)



--- a/components/esp32/include/soc/efuse_reg.h
+++ b/components/esp32/include/soc/efuse_reg.h
@@ -29,6 +29,16 @@
 #define EFUSE_RD_EFUSE_RD_DIS_M  ((EFUSE_RD_EFUSE_RD_DIS_V)<<(EFUSE_RD_EFUSE_RD_DIS_S))
 #define EFUSE_RD_EFUSE_RD_DIS_V  0xF
 #define EFUSE_RD_EFUSE_RD_DIS_S  16
+
+/* Read disable bits for efuse blocks 1-3 */
+#define EFUSE_RD_DIS_BLK1 (1<<16)
+#define EFUSE_RD_DIS_BLK2 (1<<17)
+#define EFUSE_RD_DIS_BLK3 (1<<18)
+/* Read disable FLASH_CRYPT_CONFIG, CODING_SCHEME & KEY_STATUS
+   in efuse block 0
+*/
+#define EFUSE_RD_DIS_BLK0_PARTIAL (1<<19)
+
 /* EFUSE_RD_EFUSE_WR_DIS : RO ;bitpos:[15:0] ;default: 16'b0 ; */
 /*description: read for efuse_wr_disable*/
 #define EFUSE_RD_EFUSE_WR_DIS  0x0000FFFF
@@ -36,6 +46,22 @@
 #define EFUSE_RD_EFUSE_WR_DIS_V  0xFFFF
 #define EFUSE_RD_EFUSE_WR_DIS_S  0

+/* Write disable bits */
+#define EFUSE_WR_DIS_RD_DIS (1<<0) /*< disable writing read disable reg */
+#define EFUSE_WR_DIS_WR_DIS (1<<1) /*< disable writing write disable reg */
+#define EFUSE_WR_DIS_FLASH_CRYPT_CNT (1<<2)
+#define EFUSE_WR_DIS_MAC_SPI_CONFIG_HD (1<<3) /*< disable writing MAC & SPI config hd efuses */
+#define EFUSE_WR_DIS_XPD_SDIO (1<<5) /*< disable writing SDIO config efuses */
+#define EFUSE_WR_DIS_SPI_PAD_CONFIG (1<<6) /*< disable writing SPI_PAD_CONFIG efuses */
+#define EFUSE_WR_DIS_BLK1 (1<<7) /*< disable writing BLK1 efuses */
+#define EFUSE_WR_DIS_BLK2 (1<<8) /*< disable writing BLK2 efuses */
+#define EFUSE_WR_DIS_BLK3 (1<<9) /*< disable writing BLK3 efuses */
+#define EFUSE_WR_DIS_FLASH_CRYPT_CODING_SCHEME (1<<10) /*< disable writing FLASH_CRYPT_CONFIG and CODING_SCHEME efuses */
+#define EFUSE_WR_DIS_ABS_DONE_0 (1<<12) /*< disable writing ABS_DONE_0 efuse */
+#define EFUSE_WR_DIS_ABS_DONE_1 (1<<13) /*< disable writing ABS_DONE_1 efuse */
+#define EFUSE_WR_DIS_JTAG_DISABLE (1<<14) /*< disable writing JTAG_DISABLE efuse */
+#define EFUSE_WR_DIS_CONSOLE_DL_DISABLE (1<<15) /*< disable writing CONSOLE_DEBUG_DISABLE, DISABLE_DL_ENCRYPT, DISABLE_DL_DECRYPT and DISABLE_DL_CACHE efuses */
+
 #define EFUSE_BLK0_RDATA1_REG          (DR_REG_EFUSE_BASE + 0x004)
 /* EFUSE_RD_WIFI_MAC_CRC_LOW : RO ;bitpos:[31:0] ;default: 32'b0 ; */
 /*description: read for low 32bit WIFI_MAC_Address*/
--- a/components/esp32/include/soc/frc_timer_reg.h
+++ b/components/esp32/include/soc/frc_timer_reg.h
@@ -0,0 +1,49 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+#ifndef _SOC_FRC_TIMER_REG_H_
+#define _SOC_FRC_TIMER_REG_H_
+
+#include "soc.h"
+
+/**
+ * These are the register definitions for "legacy" timers
+ */
+
+#define REG_FRC_TIMER_BASE(i)           (DR_REG_FRC_TIMER_BASE + i*0x20)
+
+#define FRC_TIMER_LOAD_REG(i)           (REG_FRC_TIMER_BASE(i) + 0x0)   // timer load value (23 bit for i==0, 32 bit for i==1)
+#define FRC_TIMER_LOAD_VALUE(i)         ((i == 0)?0x007FFFFF:0xffffffff)
+#define FRC_TIMER_LOAD_VALUE_S          0
+
+#define FRC_TIMER_COUNT_REG(i)          (REG_FRC_TIMER_BASE(i) + 0x4)   // timer count value (23 bit for i==0, 32 bit for i==1)
+#define FRC_TIMER_COUNT                 ((i == 0)?0x007FFFFF:0xffffffff)
+#define FRC_TIMER_COUNT_S               0
+
+#define FRC_TIMER_CTRL_REG(i)           (REG_FRC_TIMER_BASE(i) + 0x8)
+#define FRC_TIMER_INT_ENABLE            (BIT(8))        // enable interrupt
+#define FRC_TIMER_ENABLE                (BIT(7))        // enable timer
+#define FRC_TIMER_AUTOLOAD              (BIT(6))        // enable autoload
+#define FRC_TIMER_PRESCALER             0x00000007      // 0: divide by 1, 2: divide by 16, 4: divide by 256
+#define FRC_TIMER_PRESCALER_S           1
+#define FRC_TIMER_EDGE_INT              (BIT(0))        // 0: level, 1: edge
+
+#define FRC_TIMER_INT_REG(i)            (REG_FRC_TIMER_BASE(i) + 0xC)
+#define FRC_TIMER_INT_CLR               (BIT(0))        // clear interrupt
+
+#define FRC_TIMER_ALARM_REG(i)          (REG_FRC_TIMER_BASE(i) + 0x10)  // timer alarm value; register only present for i == 1
+#define FRC_TIMER_ALARM                 0xFFFFFFFF
+#define FRC_TIMER_ALARM_S               0
+
+#endif //_SOC_FRC_TIMER_REG_H_
--- a/components/esp32/include/soc/io_mux_reg.h
+++ b/components/esp32/include/soc/io_mux_reg.h
@@ -34,10 +34,41 @@
 #define PIN_INPUT_ENABLE(PIN_NAME)               SET_PERI_REG_MASK(PIN_NAME,FUN_IE)
 #define PIN_INPUT_DISABLE(PIN_NAME)              CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE)
 #define PIN_SET_DRV(PIN_NAME, drv)            REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv));
-#define PIN_PULLUP_DIS(PIN_NAME)                 REG_CLR_BIT(PIN_NAME, FUN_PU)
-#define PIN_PULLUP_EN(PIN_NAME)                  REG_SET_BIT(PIN_NAME, FUN_PU)
-#define PIN_PULLDWN_DIS(PIN_NAME)             REG_CLR_BIT(PIN_NAME, FUN_PD)
-#define PIN_PULLDWN_EN(PIN_NAME)              REG_SET_BIT(PIN_NAME, FUN_PD)
+
+/*
+ * @attention
+ *     The PIN_PULL[UP|DWN]_[EN|DIS]() functions used to exist as macros in previous SDK versions. 
+ *     Unfortunately, however, they do not work for some GPIOs on the ESP32 chip, which needs pullups 
+ *     and -downs turned on and off through RTC registers. The functions still exist for compatibility 
+ *     with older code, but are marked as deprecated in order to generate a warning.
+ *     Please replace them in this fashion: (make sure to include driver/gpio.h as well)
+ *     PIN_PULLUP_EN(GPIO_PIN_MUX_REG[x])   ->  gpio_pullup_en(x)
+ *     PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[x])  ->  gpio_pullup_dis(x)
+ *     PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[x])  ->  gpio_pulldown_en(x)
+ *     PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[x]) ->  gpio_pulldown_dis(x)
+ *
+*/
+static inline void __attribute__ ((deprecated)) PIN_PULLUP_DIS(uint32_t PIN_NAME) 
+{
+    REG_CLR_BIT(PIN_NAME, FUN_PU);
+}
+
+static inline void __attribute__ ((deprecated)) PIN_PULLUP_EN(uint32_t PIN_NAME)
+{
+    REG_SET_BIT(PIN_NAME, FUN_PU);
+}
+
+static inline void __attribute__ ((deprecated)) PIN_PULLDWN_DIS(uint32_t PIN_NAME)
+{
+    REG_CLR_BIT(PIN_NAME, FUN_PD);
+}
+
+static inline void __attribute__ ((deprecated)) PIN_PULLDWN_EN(uint32_t PIN_NAME)
+{
+    REG_SET_BIT(PIN_NAME, FUN_PD);
+}
+
+
 #define PIN_FUNC_SELECT(PIN_NAME, FUNC)      REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC)

 #define PIN_FUNC_GPIO                               2
--- a/components/esp32/include/soc/rmt_struct.h
+++ b/components/esp32/include/soc/rmt_struct.h
@@ -231,11 +231,10 @@ typedef volatile struct {
    struct {
        union {
            struct {
-                uint32_t level1:       1;
-                uint32_t duration1:    15;
-                uint32_t level0:       1;
                uint32_t duration0:    15;
-
+                uint32_t level0:       1;
+                uint32_t duration1:    15;
+                uint32_t level1:       1;
            };
            uint32_t val;
        } data[64];
--- a/components/esp32/include/soc/rtc_cntl_reg.h
+++ b/components/esp32/include/soc/rtc_cntl_reg.h
@@ -14,6 +14,9 @@
 #ifndef _SOC_RTC_CNTL_REG_H_
 #define _SOC_RTC_CNTL_REG_H_

+/* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
+#define RTC_CNTL_WDT_WKEY_VALUE 0x50D83AA1
+

 #include "soc.h"
 #define RTC_CNTL_OPTIONS0_REG          (DR_REG_RTCCNTL_BASE + 0x0)
@@ -236,6 +239,9 @@
 #define RTC_CNTL_TIME_VALID_V  0x1
 #define RTC_CNTL_TIME_VALID_S  30

+/* frequency of RTC slow clock, Hz */
+#define RTC_CTNL_SLOWCLK_FREQ   150000
+
 #define RTC_CNTL_TIME0_REG          (DR_REG_RTCCNTL_BASE + 0x10)
 /* RTC_CNTL_TIME_LO : RO ;bitpos:[31:0] ;default: 32'h0 ; */
 /*description: RTC timer low 32 bits*/
--- a/components/esp32/include/soc/soc.h
+++ b/components/esp32/include/soc/soc.h
@@ -149,6 +149,7 @@
 #define DR_REG_GPIO_SD_BASE                     0x3ff44f00
 #define DR_REG_FE2_BASE                         0x3ff45000
 #define DR_REG_FE_BASE                          0x3ff46000
+#define DR_REG_FRC_TIMER_BASE                   0x3ff47000
 #define DR_REG_RTCCNTL_BASE                     0x3ff48000
 #define DR_REG_RTCIO_BASE                       0x3ff48400
 #define DR_REG_SARADC_BASE                      0x3ff48800
@@ -282,9 +283,9 @@
 *      19                      2               extern level
 *      20                      2               extern level
 *      21                      2               extern level
- *      22                      3               extern edge
+ *      22                      3               extern edge             FRC1 timer
 *      23                      3               extern level
- *      24                      4               extern level
+ *      24                      4               extern level            TG1_WDT
 *      25                      4               extern level            Reserved                Reserved
 *      26                      5               extern level            Reserved                Reserved
 *      27                      3               extern level            Reserved                Reserved
@@ -302,8 +303,10 @@
 #define ETS_T0_WDT_INUM                         3
 #define ETS_WBB_INUM                            4
 #define ETS_TG0_T1_INUM                         10 /**< use edge interrupt*/
+#define ETS_FRC1_INUM                           22
+#define ETS_T1_WDT_INUM                         24

-//CPU0 Intrrupt number used in ROM, should be cancelled in SDK
+//CPU0 Interrupt number used in ROM, should be cancelled in SDK
 #define ETS_SLC_INUM                            1
 #define ETS_UART0_INUM                          5
 #define ETS_UART1_INUM                          5
--- a/components/esp32/include/soc/timer_group_reg.h
+++ b/components/esp32/include/soc/timer_group_reg.h
@@ -15,6 +15,16 @@
 #define __TIMG_REG_H__
 #include "soc.h"

+/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
+#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
+
+/* Possible values for TIMG_WDT_STGx */
+#define TIMG_WDT_STG_SEL_OFF 0
+#define TIMG_WDT_STG_SEL_INT 1
+#define TIMG_WDT_STG_SEL_RESET_CPU 2
+#define TIMG_WDT_STG_SEL_RESET_SYSTEM 3
+
+
 #define REG_TIMG_BASE(i)       (DR_REG_TIMERGROUP0_BASE + i*0x1000)
 #define TIMG_T0CONFIG_REG(i)          (REG_TIMG_BASE(i) + 0x0000)
 /* TIMG_T0_EN : R/W ;bitpos:[31] ;default: 1'h0 ; */
--- a/components/esp32/include/soc/uart_reg.h
+++ b/components/esp32/include/soc/uart_reg.h
@@ -18,8 +18,10 @@
 #include "soc.h"

 #define REG_UART_BASE( i )  (DR_REG_UART_BASE + (i) * 0x10000 + ( i > 1 ? 0xe000 : 0 ) )
-
+#define REG_UART_AHB_BASE(i)  (0x60000000 + (i) * 0x10000 + ( i > 1 ? 0xe000 : 0 ) )
+#define UART_FIFO_AHB_REG(i)  (REG_UART_AHB_BASE(i) + 0x0)
 #define UART_FIFO_REG(i)          (REG_UART_BASE(i) + 0x0)
+
 /* UART_RXFIFO_RD_BYTE : RO ;bitpos:[7:0] ;default: 8'b0 ; */
 /*description: This register stores one byte data  read by rx fifo.*/
 #define UART_RXFIFO_RD_BYTE  0x000000FF
--- a/components/esp32/int_wdt.c
+++ b/components/esp32/int_wdt.c
@@ -0,0 +1,100 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+#include "sdkconfig.h"
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <stdbool.h>
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include <esp_types.h>
+#include "esp_err.h"
+#include "esp_intr.h"
+#include "esp_attr.h"
+#include "esp_freertos_hooks.h"
+#include "soc/timer_group_struct.h"
+#include "soc/timer_group_reg.h"
+
+#include "esp_int_wdt.h"
+
+#if CONFIG_INT_WDT
+
+
+#define WDT_INT_NUM 24
+
+
+//Take care: the tick hook can also be called before esp_int_wdt_init() is called.
+#if CONFIG_INT_WDT_CHECK_CPU1
+//Not static; the ISR assembly checks this.
+bool int_wdt_app_cpu_ticked=false;
+
+static void IRAM_ATTR tick_hook(void) {
+    if (xPortGetCoreID()!=0) {
+        int_wdt_app_cpu_ticked=true;
+    } else {
+        //Only feed wdt if app cpu also ticked.
+        if (int_wdt_app_cpu_ticked) {
+            TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+            TIMERG1.wdt_config2=CONFIG_INT_WDT_TIMEOUT_MS*2;        //Set timeout before interrupt
+            TIMERG1.wdt_config3=CONFIG_INT_WDT_TIMEOUT_MS*4;        //Set timeout before reset
+            TIMERG1.wdt_feed=1;
+            TIMERG1.wdt_wprotect=0;
+            int_wdt_app_cpu_ticked=false;
+        }
+    }
+}
+#else
+static void IRAM_ATTR tick_hook(void) {
+    if (xPortGetCoreID()!=0) return;
+    TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+    TIMERG1.wdt_config2=CONFIG_INT_WDT_TIMEOUT_MS*2;        //Set timeout before interrupt
+    TIMERG1.wdt_config3=CONFIG_INT_WDT_TIMEOUT_MS*4;        //Set timeout before reset
+    TIMERG1.wdt_feed=1;
+    TIMERG1.wdt_wprotect=0;
+}
+#endif
+
+
+void esp_int_wdt_init() {
+    TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+    TIMERG1.wdt_config0.sys_reset_length=7;                 //3.2uS
+    TIMERG1.wdt_config0.cpu_reset_length=7;                 //3.2uS
+    TIMERG1.wdt_config0.level_int_en=1;
+    TIMERG1.wdt_config0.stg0=TIMG_WDT_STG_SEL_INT;          //1st stage timeout: interrupt
+    TIMERG1.wdt_config0.stg1=TIMG_WDT_STG_SEL_RESET_SYSTEM; //2nd stage timeout: reset system
+    TIMERG1.wdt_config1.clk_prescale=80*500;                //Prescaler: wdt counts in ticks of 0.5mS
+    //The timer configs initially are set to 5 seconds, to make sure the CPU can start up. The tick hook sets
+    //it to their actual value.
+    TIMERG1.wdt_config2=10000;
+    TIMERG1.wdt_config3=10000;
+    TIMERG1.wdt_config0.en=1;
+    TIMERG1.wdt_feed=1;
+    TIMERG1.wdt_wprotect=0;
+    TIMERG1.int_clr_timers.wdt=1;
+    TIMERG1.int_ena.wdt=1;
+    esp_register_freertos_tick_hook(tick_hook);
+    ESP_INTR_DISABLE(WDT_INT_NUM);
+    intr_matrix_set(xPortGetCoreID(), ETS_TG1_WDT_LEVEL_INTR_SOURCE, WDT_INT_NUM);
+    //We do not register a handler for the interrupt because it is interrupt level 4 which
+    //is not servicable from C. Instead, xtensa_vectors.S has a call to the panic handler for
+    //this interrupt.
+    ESP_INTR_ENABLE(WDT_INT_NUM);
+}
+
+
+
+#endif
--- a/components/esp32/ld/esp32.common.ld
+++ b/components/esp32/ld/esp32.common.ld
@@ -3,8 +3,38 @@ ENTRY(call_start_cpu0);

 SECTIONS
 {
+  /* RTC fast memory holds RTC wake stub code,
+     including from any source file named rtc_wake_stub*.c
+  */
+  .rtc.text :
+  {
+    . = ALIGN(4);
+    *(.rtc.literal .rtc.text)
+    *rtc_wake_stub*.o(.literal .text .literal.* .text.*)
+  } >rtc_iram_seg
+
+  /* RTC slow memory holds RTC wake stub
+     data/rodata, including from any source file
+     named rtc_wake_stub*.c
+  */
+  .rtc.data :
+  {
+    *(.rtc.data)
+    *(.rtc.rodata)
+    *rtc_wake_stub*.o(.data .rodata .data.* .rodata.* .bss .bss.*)
+  } > rtc_slow_seg
+
+  /* RTC bss, from any source file named rtc_wake_stub*.c */
+  .rtc.bss (NOLOAD) :
+  {
+    _rtc_bss_start = ABSOLUTE(.);
+    *rtc_wake_stub*.o(.bss .bss.*)
+    *rtc_wake_stub*.o(COMMON)
+    _rtc_bss_end = ABSOLUTE(.);
+  } > rtc_slow_seg
+
  /* Send .iram0 code to iram */
-  .iram0.vectors : 
+  .iram0.vectors :
  {
    /* Vectors go to IRAM */
    _init_start = ABSOLUTE(.);
@@ -47,6 +77,7 @@ SECTIONS
    _iram_text_start = ABSOLUTE(.);
    *(.iram1 .iram1.*)
    *libfreertos.a:(.literal .text .literal.* .text.*)
+    *libesp32.a:panic.o(.literal .text .literal.* .text.*)
    *libphy.a:(.literal .text .literal.* .text.*)
    *librtc.a:(.literal .text .literal.* .text.*)
    *libpp.a:(.literal .text .literal.* .text.*)
@@ -92,6 +123,7 @@ SECTIONS
    KEEP(*(.gnu.linkonce.s2.*))
    KEEP(*(.jcr))
    *(.dram1 .dram1.*)
+    *libesp32.a:panic.o(.rodata .rodata.*)
    _data_end = ABSOLUTE(.);
    . = ALIGN(4);
    _heap_start = ABSOLUTE(.);
@@ -153,16 +185,4 @@ SECTIONS
    _text_end = ABSOLUTE(.);
    _etext = .;
  } >iram0_2_seg
-
-  .rtc.text :
-  {
-    . = ALIGN(4);
-    *(.rtc.literal .rtc.text)
-  } >rtc_iram_seg
-
-  .rtc.data :
-  {
-    *(.rtc.data)
-    *(.rtc.rodata)
-  } > rtc_slow_seg
 }
--- a/components/esp32/ld/esp32.rom.ld
+++ b/components/esp32/ld/esp32.rom.ld
@@ -286,6 +286,7 @@ PROVIDE ( _global_impure_ptr = 0x3ffae0b0 );
 PROVIDE ( gmtime = 0x40059848 );
 PROVIDE ( gmtime_r = 0x40059868 );
 PROVIDE ( g_phyFuns_instance = 0x3ffae0c4 );
+PROVIDE ( g_rom_flashchip = 0x3ffae270 );
 PROVIDE ( gpio_init = 0x40009c20 );
 PROVIDE ( gpio_input_get = 0x40009b88 );
 PROVIDE ( gpio_input_get_high = 0x40009b9c );
@@ -1584,6 +1585,8 @@ PROVIDE ( SPIEraseBlock = 0x40062c4c );
 PROVIDE ( SPIEraseChip = 0x40062c14 );
 PROVIDE ( SPIEraseSector = 0x40062ccc );
 PROVIDE ( spi_flash_attach = 0x40062a6c );
+/* NB: SPIUnlock @ 0x400628b0 has been replaced with an updated
+    version in the "spi_flash" component */
 PROVIDE ( SPILock = 0x400628f0 );
 PROVIDE ( SPIMasterReadModeCnfig = 0x40062b64 );
 PROVIDE ( spi_modes = 0x3ff99270 );
@@ -1595,9 +1598,8 @@ PROVIDE ( SPIReadModeCnfig = 0x40062944 );
 PROVIDE ( SPI_read_status = 0x4006226c );
 /* This is static function, but can be used, not generated by script*/
 PROVIDE ( SPI_read_status_high = 0x40062448 );
-PROVIDE ( SPIUnlock = 0x400628b0 );
 PROVIDE ( SPI_user_command_read = 0x400621b0 );
-PROVIDE ( spi_w25q16 = 0x3ffae270 );
+PROVIDE ( SPI_flashchip_data = 0x3ffae270 );
 PROVIDE ( SPIWrite = 0x40062d50 );
 /* This is static function, but can be used, not generated by script*/
 PROVIDE ( SPI_write_enable = 0x40062320 );
--- a/components/esp32/lib
+++ b/components/esp32/lib
--- a/components/esp32/panic.c
+++ b/components/esp32/panic.c
@@ -0,0 +1,287 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+#include <stdlib.h>
+
+#include <xtensa/config/core.h>
+
+#include "rom/rtc.h"
+
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include "freertos/xtensa_api.h"
+
+#include "soc/uart_reg.h"
+#include "soc/io_mux_reg.h"
+#include "soc/dport_reg.h"
+#include "soc/rtc_cntl_reg.h"
+#include "soc/timer_group_struct.h"
+#include "soc/timer_group_reg.h"
+
+#include "esp_gdbstub.h"
+#include "esp_panic.h"
+#include "esp_attr.h"
+
+/*
+Panic handlers; these get called when an unhandled exception occurs or the assembly-level
+task switching / interrupt code runs into an unrecoverable error. The default task stack
+overflow handler also is in here.
+*/
+
+/*
+Note: The linker script will put everything in this file in IRAM/DRAM, so it also works with flash cache disabled.
+*/
+
+#if !CONFIG_ESP32_PANIC_SILENT_REBOOT
+//printf may be broken, so we fix our own printing fns...
+inline static void panicPutchar(char c) {
+	while (((READ_PERI_REG(UART_STATUS_REG(0))>>UART_TXFIFO_CNT_S)&UART_TXFIFO_CNT)>=126) ;
+	WRITE_PERI_REG(UART_FIFO_REG(0), c);
+}
+
+inline static void panicPutStr(const char *c) {
+	int x=0;
+	while (c[x]!=0) {
+		panicPutchar(c[x]);
+		x++;
+	}
+}
+
+inline static void panicPutHex(int a) {
+	int x;
+	int c;
+	panicPutchar(' ');
+	for (x=0; x<8; x++) {
+		c=(a>>28)&0xf;
+		if (c<10) panicPutchar('0'+c); else panicPutchar('a'+c-10);
+		a<<=4;
+	}
+}
+
+inline static void panicPutDec(int a) {
+	int n1, n2;
+	n1=a%10;
+	n2=a/10;
+	panicPutchar(' ');
+	if (n2==0) panicPutchar(' '); else panicPutchar(n2+'0');
+	panicPutchar(n1+'0');
+}
+#else
+//No printing wanted. Stub out these functions.
+inline static void panicPutchar(char c) { }
+inline static void panicPutStr(const char *c) { }
+inline static void panicPutHex(int a) { }
+inline static void panicPutDec(int a) { }
+#endif
+
+
+void  __attribute__((weak)) vApplicationStackOverflowHook( TaskHandle_t xTask, signed char *pcTaskName ) {
+	panicPutStr("***ERROR*** A stack overflow in task ");
+	panicPutStr((char*)pcTaskName);
+	panicPutStr(" has been detected.\r\n");
+}
+
+static const char *edesc[]={
+		"IllegalInstruction", "Syscall", "InstructionFetchError", "LoadStoreError",
+		"Level1Interrupt", "Alloca", "IntegerDivideByZero", "PCValue",
+		"Privileged", "LoadStoreAlignment", "res", "res",
+		"InstrPDAddrError", "LoadStorePIFDataError", "InstrPIFAddrError", "LoadStorePIFAddrError",
+		"InstTLBMiss", "InstTLBMultiHit", "InstFetchPrivilege", "res",
+		"InstrFetchProhibited", "res", "res", "res",
+		"LoadStoreTLBMiss", "LoadStoreTLBMultihit", "LoadStorePrivilege", "res",
+		"LoadProhibited", "StoreProhibited", "res", "res",
+		"Cp0Dis", "Cp1Dis", "Cp2Dis", "Cp3Dis",
+		"Cp4Dis", "Cp5Dis", "Cp6Dis", "Cp7Dis"
+	};
+
+
+void commonErrorHandler(XtExcFrame *frame);
+
+//The fact that we've panic'ed probably means the other CPU is now running wild, possibly
+//messing up the serial output, so we kill it here.
+static void haltOtherCore() {
+	if (xPortGetCoreID()==0) {
+		//Kill app cpu
+		CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, RTC_CNTL_SW_STALL_APPCPU_C1_M);
+		SET_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, 0x21<<RTC_CNTL_SW_STALL_APPCPU_C1_S);
+		CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_STALL_APPCPU_C0_M);
+		SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, 2<<RTC_CNTL_SW_STALL_APPCPU_C0_S);
+	} else {
+		//Kill pro cpu
+		CLEAR_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, RTC_CNTL_SW_STALL_PROCPU_C1_M);
+		SET_PERI_REG_MASK(RTC_CNTL_SW_CPU_STALL_REG, 0x21<<RTC_CNTL_SW_STALL_PROCPU_C1_S);
+		CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_SW_STALL_PROCPU_C0_M);
+		SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, 2<<RTC_CNTL_SW_STALL_PROCPU_C0_S);
+	}
+}
+
+//Returns true when a debugger is attached using JTAG.
+static int inOCDMode() {
+#if CONFIG_ESP32_DEBUG_OCDAWARE
+	int dcr;
+	int reg=0x10200C; //DSRSET register
+	asm("rer %0,%1":"=r"(dcr):"r"(reg));
+	return (dcr&0x1);
+#else
+	return 0; //Always return no debugger is attached.
+#endif
+}
+
+void panicHandler(XtExcFrame *frame) {
+	int *regs=(int*)frame;
+	//Please keep in sync with PANIC_RSN_* defines
+	const char *reasons[]={
+			"Unknown reason",
+			"Unhandled debug exception",
+			"Double exception",
+			"Unhandled kernel exception",
+			"Coprocessor exception",
+			"Interrupt wdt timeout on CPU0",
+			"Interrupt wdt timeout on CPU1",
+		};
+	const char *reason=reasons[0];
+	//The panic reason is stored in the EXCCAUSE register.
+	if (regs[20]<=PANIC_RSN_MAX) reason=reasons[regs[20]];
+	haltOtherCore();
+	panicPutStr("Guru Meditation Error: Core ");
+	panicPutDec(xPortGetCoreID());
+	panicPutStr(" panic'ed (");
+	panicPutStr(reason);
+	panicPutStr(")\r\n");
+
+	if (inOCDMode()) {
+		asm("break.n 1");
+	}
+	commonErrorHandler(frame);
+}
+
+static void setFirstBreakpoint(uint32_t pc) {
+	asm(
+		"wsr.ibreaka0 %0\n" \
+		"rsr.ibreakenable a3\n" \
+		"movi a4,1\n" \
+		"or a4, a4, a3\n" \
+		"wsr.ibreakenable a4\n" \
+		::"r"(pc):"a3","a4");
+}
+
+void xt_unhandled_exception(XtExcFrame *frame) {
+	int *regs=(int*)frame;
+	int x;
+
+	haltOtherCore();
+	panicPutStr("Guru Meditation Error of type ");
+	x=regs[20];
+	if (x<40) panicPutStr(edesc[x]); else panicPutStr("Unknown");
+	panicPutStr(" occurred on core ");
+	panicPutDec(xPortGetCoreID());
+	if (inOCDMode()) {
+		panicPutStr(" at pc=");
+		panicPutHex(regs[1]);
+		panicPutStr(". Setting bp and returning..\r\n");
+		//Stick a hardware breakpoint on the address the handler returns to. This way, the OCD debugger
+		//will kick in exactly at the context the error happened.
+		setFirstBreakpoint(regs[1]);
+		return;
+	}
+	panicPutStr(". Exception was unhandled.\r\n");
+	commonErrorHandler(frame);
+}
+
+
+/*
+If watchdogs are enabled, the panic handler runs the risk of getting aborted pre-emptively because
+an overzealous watchdog decides to reset it. On the other hand, if we disable all watchdogs, we run
+the risk of somehow halting in the panic handler and not resetting. That is why this routine kills 
+all watchdogs except the timer group 0 watchdog, and it reconfigures that to reset the chip after
+one second.
+*/
+static void reconfigureAllWdts() {
+	TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+	TIMERG0.wdt_feed=1;
+	TIMERG0.wdt_config0.sys_reset_length=7;				//3.2uS
+	TIMERG0.wdt_config0.cpu_reset_length=7;				//3.2uS
+	TIMERG0.wdt_config0.stg0=TIMG_WDT_STG_SEL_RESET_SYSTEM;	//1st stage timeout: reset system
+	TIMERG0.wdt_config1.clk_prescale=80*500;			//Prescaler: wdt counts in ticks of 0.5mS
+	TIMERG0.wdt_config2=2000;							//1 second before reset
+	TIMERG0.wdt_config0.en=1;
+	TIMERG0.wdt_wprotect=0;
+	//Disable wdt 1
+	TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+	TIMERG1.wdt_config0.en=0;
+	TIMERG1.wdt_wprotect=0;
+}
+
+#if CONFIG_ESP32_PANIC_GDBSTUB || CONFIG_ESP32_PANIC_PRINT_HALT
+/*
+This disables all the watchdogs for when we call the gdbstub.
+*/
+static void disableAllWdts() {
+	TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+	TIMERG0.wdt_config0.en=0;
+	TIMERG0.wdt_wprotect=0;
+	TIMERG1.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+	TIMERG1.wdt_config0.en=0;
+	TIMERG0.wdt_wprotect=0;
+}
+
+#endif
+
+/*
+We arrive here after a panic or unhandled exception, when no OCD is detected. Dump the registers to the
+serial port and either jump to the gdb stub, halt the CPU or reboot.
+*/
+void commonErrorHandler(XtExcFrame *frame) {
+	int *regs=(int*)frame;
+	int x, y;
+	const char *sdesc[]={
+		"PC      ","PS      ","A0      ","A1      ","A2      ","A3      ","A4      ","A5      ",
+		"A6      ","A7      ","A8      ","A9      ","A10     ","A11     ","A12     ","A13     ",
+		"A14     ","A15     ","SAR     ","EXCCAUSE","EXCVADDR","LBEG    ","LEND    ","LCOUNT  "};
+
+	//Feed the watchdogs, so they will give us time to print out debug info
+	reconfigureAllWdts();
+
+	panicPutStr("Register dump:\r\n");
+
+	for (x=0; x<24; x+=4) {
+		for (y=0; y<4; y++) {
+			if (sdesc[x+y][0]!=0) {
+				panicPutStr(sdesc[x+y]);
+				panicPutStr(": ");
+				panicPutHex(regs[x+y+1]);
+				panicPutStr("  ");
+			}
+		}
+		panicPutStr("\r\n");
+	}
+#if CONFIG_ESP32_PANIC_GDBSTUB
+	disableAllWdts();
+	panicPutStr("Entering gdb stub now.\r\n");
+	esp_gdbstub_panic_handler(frame);
+#elif CONFIG_ESP32_PANIC_PRINT_REBOOT || CONFIG_ESP32_PANIC_SILENT_REBOOT
+	panicPutStr("Rebooting...\r\n");
+	for (x=0; x<100; x++) ets_delay_us(1000);
+	software_reset();
+#else
+	disableAllWdts();
+	panicPutStr("CPU halted.\r\n");
+	while(1);
+#endif
+}
+
+
+void esp_set_breakpoint_if_jtag(void *fn) {
+	if (!inOCDMode()) return;
+	setFirstBreakpoint((uint32_t)fn);
+}
--- a/components/esp32/syscalls.c
+++ b/components/esp32/syscalls.c
@@ -1,457 +0,0 @@
-// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
-//
-// Licensed under the Apache License, Version 2.0 (the "License");
-// you may not use this file except in compliance with the License.
-// You may obtain a copy of the License at
-
-//     http://www.apache.org/licenses/LICENSE-2.0
-//
-// Unless required by applicable law or agreed to in writing, software
-// distributed under the License is distributed on an "AS IS" BASIS,
-// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-// See the License for the specific language governing permissions and
-// limitations under the License.
-#include <string.h>
-#include <stdbool.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <errno.h>
-#include <sys/reent.h>
-#include <stdlib.h>
-#include "esp_attr.h"
-#include "rom/libc_stubs.h"
-#include "rom/uart.h"
-#include "soc/cpu.h"
-#include "freertos/FreeRTOS.h"
-#include "freertos/semphr.h"
-#include "freertos/portmacro.h"
-#include "freertos/task.h"
-
-void abort() {
-    do
-    {
-        __asm__ ("break 0,0");
-        *((int*) 0) = 0;
-    } while(true);
-}
-
-void* _malloc_r(struct _reent *r, size_t size) {
-    return pvPortMalloc(size);
-}
-
-void _free_r(struct _reent *r, void* ptr) {
-    return vPortFree(ptr);
-}
-
-void* _realloc_r(struct _reent *r, void* ptr, size_t size) {
-	void* new_chunk;
-	if (size == 0) {
-		if (ptr) {
-			vPortFree(ptr);
-		}
-		return NULL;
-	}
-
-	new_chunk = pvPortMalloc(size);
-	if (new_chunk && ptr) {
-		memcpy(new_chunk, ptr, size);
-		vPortFree(ptr);
-	}
-	// realloc behaviour: don't free original chunk if alloc failed
-	return new_chunk;
-}
-
-void* _calloc_r(struct _reent *r, size_t count, size_t size) {
-    void* result = pvPortMalloc(count * size);
-    if (result)
-    {
-    	memset(result, 0, count * size);
-    }
-    return result;
-}
-
-int _system_r(struct _reent *r, const char *str) {
-    abort();
-    return 0;
-}
-
-int _rename_r(struct _reent *r, const char *src, const char *dst) {
-    abort();
-    return 0;
-}
-
-clock_t _times_r(struct _reent *r, struct tms *ptms) {
-    abort();
-    return 0;
-}
-
-// TODO: read time from RTC
-int _gettimeofday_r(struct _reent *r, struct timeval *tv, void *tz) {
-    abort();
-    return 0;
-}
-
-void _raise_r(struct _reent *r) {
-    abort();
-}
-
-int _unlink_r(struct _reent *r, const char *path) {
-    abort();
-    return 0;
-}
-
-int _link_r(struct _reent *r, const char* n1, const char* n2) {
-    abort();
-    return 0;
-}
-
-int _stat_r(struct _reent *r, const char * path, struct stat * st) {
-    return 0;
-}
-
-int _fstat_r(struct _reent *r, int fd, struct stat * st) {
-	st->st_mode = S_IFCHR;
-    return 0;
-}
-
-void* _sbrk_r(struct _reent *r, ptrdiff_t sz) {
-    abort();
-    return 0;
-}
-
-int _getpid_r(struct _reent *r) {
-    abort();
-    return 0;
-}
-
-int _kill_r(struct _reent *r, int pid, int sig) {
-    abort();
-    return 0;
-}
-
-void _exit_r(struct _reent *r, int e) {
-    abort();
-}
-
-int _close_r(struct _reent *r, int fd) {
-    return 0;
-}
-
-int _open_r(struct _reent *r, const char * path, int flags, int mode) {
-    return 0;
-}
-
-void _exit(int __status) {
-    abort();
-}
-
-ssize_t _write_r(struct _reent *r, int fd, const void * data, size_t size) {
-    const char *data_c = (const char *)data;
-    if (fd == STDOUT_FILENO) {
-        static _lock_t stdout_lock; /* lazily initialised */
-        /* Even though newlib does stream locking on stdout, we need
-           a dedicated stdout UART lock...
-
-           This is because each task has its own _reent structure with
-           unique FILEs for stdin/stdout/stderr, so these are
-           per-thread (lazily initialised by __sinit the first time a
-           stdio function is used, see findfp.c:235.
-
-           It seems like overkill to allocate a FILE-per-task and lock
-           a thread-local stream, but I see no easy way to fix this
-           (pre-__sinit_, tasks have "fake" FILEs ie __sf_fake_stdout
-           which aren't fully valid.)
-        */
-        _lock_acquire_recursive(&stdout_lock);
-        for (size_t i = 0; i < size; i++) {
-#if CONFIG_NEWLIB_STDOUT_ADDCR
-            if (data_c[i]=='\n') {
-                uart_tx_one_char('\r');
-            }
-#endif
-            uart_tx_one_char(data_c[i]);
-        }
-        _lock_release_recursive(&stdout_lock);
-    }
-    return size;
-}
-
-_off_t _lseek_r(struct _reent *r, int fd, _off_t size, int mode) {
-    return 0;
-}
-
-// TODO: implement reading from UART
-ssize_t _read_r(struct _reent *r, int fd, void * dst, size_t size) {
-    return 0;
-}
-
-/* Notes on our newlib lock implementation:
- *
- * - Use FreeRTOS mutex semaphores as locks.
- * - lock_t is int, but we store an xSemaphoreHandle there.
- * - Locks are no-ops until the FreeRTOS scheduler is running.
- * - Due to this, locks need to be lazily initialised the first time
- *   they are acquired. Initialisation/deinitialisation of locks is
- *   protected by lock_init_spinlock.
- * - Race conditions around lazy initialisation (via lock_acquire) are
- *   protected against.
- * - Anyone calling lock_close is reponsible for ensuring noone else
- *   is holding the lock at this time.
- * - Race conditions between lock_close & lock_init (for the same lock)
- *   are the responsibility of the caller.
- */
-
-static portMUX_TYPE lock_init_spinlock = portMUX_INITIALIZER_UNLOCKED;
-
-/* Initialise the given lock by allocating a new mutex semaphore
-   as the _lock_t value.
-*/
-static void IRAM_ATTR lock_init_generic(_lock_t *lock, uint8_t mutex_type) {
-    portENTER_CRITICAL(&lock_init_spinlock);
-    if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) {
-        /* nothing to do until the scheduler is running */
-        *lock = 0; /* ensure lock is zeroed out, in case it's an automatic variable */
-        portEXIT_CRITICAL(&lock_init_spinlock);
-        return;
-    }
-
-    if (*lock) {
-         /* Lock already initialised (either we didn't check earlier,
-          or it got initialised while we were waiting for the
-          spinlock.) */
-    }
-    else
-    {
-        /* Create a new semaphore
-
-           this is a bit of an API violation, as we're calling the
-           private function xQueueCreateMutex(x) directly instead of
-           the xSemaphoreCreateMutex / xSemaphoreCreateRecursiveMutex
-           wrapper functions...
-
-           The better alternative would be to pass pointers to one of
-           the two xSemaphoreCreate___Mutex functions, but as FreeRTOS
-           implements these as macros instead of inline functions
-           (*party like it's 1998!*) it's not possible to do this
-           without writing wrappers. Doing it this way seems much less
-           spaghetti-like.
-        */
-        xSemaphoreHandle new_sem = xQueueCreateMutex(mutex_type);
-        if (!new_sem) {
-            abort(); /* No more semaphores available or OOM */
-        }
-        *lock = (_lock_t)new_sem;
-    }
-    portEXIT_CRITICAL(&lock_init_spinlock);
-}
-
-void IRAM_ATTR _lock_init(_lock_t *lock) {
-    lock_init_generic(lock, queueQUEUE_TYPE_MUTEX);
-}
-
-void IRAM_ATTR _lock_init_recursive(_lock_t *lock) {
-    lock_init_generic(lock, queueQUEUE_TYPE_RECURSIVE_MUTEX);
-}
-
-/* Free the mutex semaphore pointed to by *lock, and zero it out.
-
-   Note that FreeRTOS doesn't account for deleting mutexes while they
-   are held, and neither do we... so take care not to delete newlib
-   locks while they may be held by other tasks!
-*/
-void IRAM_ATTR _lock_close(_lock_t *lock) {
-    portENTER_CRITICAL(&lock_init_spinlock);
-    if (*lock) {
-        xSemaphoreHandle h = (xSemaphoreHandle)(*lock);
-#if (INCLUDE_xSemaphoreGetMutexHolder == 1)
-        configASSERT(xSemaphoreGetMutexHolder(h) == NULL); /* mutex should not be held */
-#endif
-        vSemaphoreDelete(h);
-        *lock = 0;
-    }
-    portEXIT_CRITICAL(&lock_init_spinlock);
-}
-
-/* Acquire the mutex semaphore for lock. wait up to delay ticks.
-   mutex_type is queueQUEUE_TYPE_RECURSIVE_MUTEX or queueQUEUE_TYPE_MUTEX
-*/
-static int IRAM_ATTR lock_acquire_generic(_lock_t *lock, uint32_t delay, uint8_t mutex_type) {
-    xSemaphoreHandle h = (xSemaphoreHandle)(*lock);
-    if (!h) {
-        if (xTaskGetSchedulerState() == taskSCHEDULER_NOT_STARTED) {
-            return 0; /* locking is a no-op before scheduler is up, so this "succeeds" */
-        }
-        /* lazy initialise lock - might have had a static initializer in newlib (that we don't use),
-           or _lock_init might have been called before the scheduler was running... */
-        lock_init_generic(lock, mutex_type);
-        h = (xSemaphoreHandle)(*lock);
-        configASSERT(h != NULL);
-    }
-
-    BaseType_t success;
-    if (cpu_in_interrupt_context()) {
-        /* In ISR Context */
-        if (mutex_type == queueQUEUE_TYPE_RECURSIVE_MUTEX) {
-            abort(); /* recursive mutexes make no sense in ISR context */
-        }
-        BaseType_t higher_task_woken = false;
-        success = xSemaphoreTakeFromISR(h, &higher_task_woken);
-        if (!success && delay > 0) {
-            abort(); /* Tried to block on mutex from ISR, couldn't... rewrite your program to avoid libc interactions in ISRs! */
-        }
-        if (higher_task_woken) {
-            portYIELD_FROM_ISR();
-        }
-    }
-    else {
-        /* In task context */
-        if (mutex_type == queueQUEUE_TYPE_RECURSIVE_MUTEX) {
-            success = xSemaphoreTakeRecursive(h, delay);
-        } else {
-            success = xSemaphoreTake(h, delay);
-        }
-    }
-
-    return (success == pdTRUE) ? 0 : -1;
-}
-
-void IRAM_ATTR _lock_acquire(_lock_t *lock) {
-    lock_acquire_generic(lock, portMAX_DELAY, queueQUEUE_TYPE_MUTEX);
-}
-
-void IRAM_ATTR _lock_acquire_recursive(_lock_t *lock) {
-    lock_acquire_generic(lock, portMAX_DELAY, queueQUEUE_TYPE_RECURSIVE_MUTEX);
-}
-
-int IRAM_ATTR _lock_try_acquire(_lock_t *lock) {
-    return lock_acquire_generic(lock, 0, queueQUEUE_TYPE_MUTEX);
-}
-
-int IRAM_ATTR _lock_try_acquire_recursive(_lock_t *lock) {
-    return lock_acquire_generic(lock, 0, queueQUEUE_TYPE_RECURSIVE_MUTEX);
-}
-
-/* Release the mutex semaphore for lock.
-   mutex_type is queueQUEUE_TYPE_RECURSIVE_MUTEX or queueQUEUE_TYPE_MUTEX
-*/
-static void IRAM_ATTR lock_release_generic(_lock_t *lock, uint8_t mutex_type) {
-    xSemaphoreHandle h = (xSemaphoreHandle)(*lock);
-    if (h == NULL) {
-        /* This is probably because the scheduler isn't running yet,
-           or the scheduler just started running and some code was
-           "holding" a not-yet-initialised lock... */
-        return;
-    }
-
-    if (cpu_in_interrupt_context()) {
-        if (mutex_type == queueQUEUE_TYPE_RECURSIVE_MUTEX) {
-            abort(); /* indicates logic bug, it shouldn't be possible to lock recursively in ISR */
-        }
-        BaseType_t higher_task_woken = false;
-        xSemaphoreGiveFromISR(h, &higher_task_woken);
-        if (higher_task_woken) {
-            portYIELD_FROM_ISR();
-        }
-    } else {
-        if (mutex_type == queueQUEUE_TYPE_RECURSIVE_MUTEX) {
-            xSemaphoreGiveRecursive(h);
-        } else {
-            xSemaphoreGive(h);
-        }
-    }
-}
-
-void IRAM_ATTR _lock_release(_lock_t *lock) {
-    lock_release_generic(lock, queueQUEUE_TYPE_MUTEX);
-}
-
-void IRAM_ATTR _lock_release_recursive(_lock_t *lock) {
-    lock_release_generic(lock, queueQUEUE_TYPE_RECURSIVE_MUTEX);
-}
-
-// This function is not part on newlib API, it is defined in libc/stdio/local.h
-// It is called as part of _reclaim_reent via a pointer in __cleanup member 
-// of struct _reent.
-// This function doesn't call _fclose_r for _stdin, _stdout, _stderr members
-// of struct reent. Not doing so causes a memory leak each time a task is
-// terminated. We replace __cleanup member with _extra_cleanup_r (below) to work
-// around this.
-extern void _cleanup_r(struct _reent* r);
-
-void _extra_cleanup_r(struct _reent* r)
-{
-    _cleanup_r(r);
-    _fclose_r(r, r->_stdout);
-    _fclose_r(r, r->_stderr);
-    _fclose_r(r, r->_stdin);
-}
-
-static struct _reent s_reent;
-
-/*
- General ToDo that the Xtensa newlib support code did but we do not: Close every open fd a running task had when the task
- is killed. Do we want that too? - JD
-*/
-
-extern int _printf_float(struct _reent *rptr,
-               void *pdata,
-               FILE * fp,
-               int (*pfunc) (struct _reent *, FILE *, _CONST char *, size_t len), 
-               va_list * ap);
-
-
-extern int _scanf_float(struct _reent *rptr,
-              void *pdata,
-              FILE *fp, 
-              va_list *ap);
-
-
-static struct syscall_stub_table s_stub_table = {
-    .__getreent = &__getreent,
-    ._malloc_r = &_malloc_r,
-    ._free_r = &_free_r,
-    ._realloc_r = &_realloc_r,
-    ._calloc_r = &_calloc_r,
-    ._abort = &abort,
-    ._system_r = &_system_r,
-    ._rename_r = &_rename_r,
-    ._times_r = &_times_r,
-    ._gettimeofday_r = &_gettimeofday_r,
-    ._raise_r = &_raise_r,
-    ._unlink_r = &_unlink_r,
-    ._link_r = &_link_r,
-    ._stat_r = &_stat_r,
-    ._fstat_r = &_fstat_r,
-    ._sbrk_r = &_sbrk_r,
-    ._getpid_r = &_getpid_r,
-    ._kill_r = &_kill_r,
-    ._exit_r = &_exit_r,
-    ._close_r = &_close_r,
-    ._open_r = &_open_r,
-    ._write_r = (int (*)(struct _reent *r, int, const void *, int)) &_write_r,
-    ._lseek_r = (int (*)(struct _reent *r, int, int, int)) &_lseek_r,
-    ._read_r = (int (*)(struct _reent *r, int, void *, int)) &_read_r,
-    ._lock_init = &_lock_init,
-    ._lock_init_recursive = &_lock_init_recursive,
-    ._lock_close = &_lock_close,
-    ._lock_close_recursive = &_lock_close,
-    ._lock_acquire = &_lock_acquire,
-    ._lock_acquire_recursive = &_lock_acquire_recursive,
-    ._lock_try_acquire = &_lock_try_acquire,
-    ._lock_try_acquire_recursive = &_lock_try_acquire_recursive,
-    ._lock_release = &_lock_release,
-    ._lock_release_recursive = &_lock_release_recursive,
-    ._printf_float = &_printf_float,
-    ._scanf_float = &_scanf_float,
-};
-
-void ets_setup_syscalls() {
-	syscall_table_ptr_pro = &s_stub_table;
-	syscall_table_ptr_app = &s_stub_table;
-	_GLOBAL_REENT = &s_reent;
-    environ = malloc(sizeof(char*));
-    environ[0] = NULL;
-}
-
-
--- a/components/esp32/task_wdt.c
+++ b/components/esp32/task_wdt.c
@@ -0,0 +1,181 @@
+// Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+
+//     http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <stdbool.h>
+#include "sdkconfig.h"
+#include "freertos/FreeRTOS.h"
+#include "freertos/task.h"
+#include <esp_types.h>
+#include "esp_err.h"
+#include "esp_intr.h"
+#include "esp_attr.h"
+#include "esp_freertos_hooks.h"
+#include "soc/timer_group_struct.h"
+#include "soc/timer_group_reg.h"
+#include "esp_log.h"
+
+#include "esp_task_wdt.h"
+
+#if CONFIG_TASK_WDT
+
+static const char* TAG = "task_wdt";
+
+typedef struct wdt_task_t wdt_task_t;
+struct wdt_task_t {
+    TaskHandle_t task_handle;
+    bool fed_watchdog;
+    wdt_task_t *next;
+};
+
+static wdt_task_t *wdt_task_list=NULL;
+
+static void IRAM_ATTR task_wdt_isr(void *arg) {
+    wdt_task_t *wdttask;
+    const char *cpu;
+    //Feed the watchdog so we do not reset
+    TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+    TIMERG0.wdt_feed=1;
+    TIMERG0.wdt_wprotect=0;
+    //Ack interrupt
+    TIMERG0.int_clr_timers.wdt=1;
+    //Watchdog got triggered because at least one task did not report in.
+    ets_printf("Task watchdog got triggered. The following tasks did not feed the watchdog in time:\n");
+    for (wdttask=wdt_task_list; wdttask!=NULL; wdttask=wdttask->next) {
+        if (!wdttask->fed_watchdog) {
+            cpu=xTaskGetAffinity(wdttask->task_handle)==0?"CPU 0":"CPU 1";
+            if (xTaskGetAffinity(wdttask->task_handle)==tskNO_AFFINITY) cpu="CPU 0/1";
+            printf(" - %s (%s)\n", pcTaskGetTaskName(wdttask->task_handle), cpu);
+        }
+    }
+    ets_printf("Tasks currently running:\n");
+    for (int x=0; x<portNUM_PROCESSORS; x++) {
+        ets_printf("CPU %d: %s\n", x, pcTaskGetTaskName(xTaskGetCurrentTaskHandleForCPU(x)));
+    }
+
+#if CONFIG_TASK_WDT_PANIC
+    ets_printf("Aborting.\n");
+    abort();
+#endif
+}
+
+
+void esp_task_wdt_feed() {
+    wdt_task_t *wdttask=wdt_task_list;
+    bool found_task=false, do_feed_wdt=true;
+    TaskHandle_t handle=xTaskGetCurrentTaskHandle();
+    //Walk the linked list of wdt tasks to find this one, as well as see if we need to feed
+    //the real watchdog timer.
+    for (wdttask=wdt_task_list; wdttask!=NULL; wdttask=wdttask->next) {
+        //See if we are at the current task.
+        if (wdttask->task_handle == handle) {
+            wdttask->fed_watchdog=true;
+            found_task=true;
+        }
+        //If even one task in the list doesn't have the do_feed_wdt var set, we do not feed the watchdog.
+        if (!wdttask->fed_watchdog) do_feed_wdt=false;
+    }
+    
+    if (!found_task) {
+        //This is the first time the task calls the task_wdt_feed function. Create a new entry for it in
+        //the linked list.
+        wdt_task_t *newtask=malloc(sizeof(wdt_task_t));
+        memset(newtask, 0, sizeof(wdt_task_t));
+        newtask->task_handle=handle;
+        newtask->fed_watchdog=true;
+        if (wdt_task_list == NULL) {
+            wdt_task_list=newtask;
+        } else {
+            for (wdttask=wdt_task_list; wdttask->next!=NULL; wdttask=wdttask->next) ;
+            wdttask->next=newtask;
+        }
+    }
+    if (do_feed_wdt) {
+        //All tasks have checked in; time to feed the hw watchdog.
+        TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+        TIMERG0.wdt_feed=1;
+        TIMERG0.wdt_wprotect=0;
+        //Reset fed_watchdog status
+        for (wdttask=wdt_task_list; wdttask->next!=NULL; wdttask=wdttask->next) wdttask->fed_watchdog=false;
+    }
+}
+
+void esp_task_wdt_delete() {
+    TaskHandle_t handle=xTaskGetCurrentTaskHandle();
+    wdt_task_t *wdttask=wdt_task_list;
+    //Wdt task list can't be empty
+    if (!wdt_task_list) {
+        ESP_LOGE(TAG, "task_wdt_delete: No tasks in list?");
+        return;
+    }
+    if (handle==wdt_task_list) {
+        //Current task is first on list.
+        wdt_task_list=wdt_task_list->next;
+        free(wdttask);
+    } else {
+        //Find current task in list
+        while (wdttask->next!=NULL && wdttask->next->task_handle!=handle) wdttask=wdttask->next;
+        if (!wdttask->next) {
+            ESP_LOGE(TAG, "task_wdt_delete: Task never called task_wdt_feed!");
+            return;
+        }
+        wdt_task_t *freeme=wdttask->next;
+        wdttask->next=wdttask->next->next;
+        free(freeme);
+    }
+}
+
+
+#if CONFIG_TASK_WDT_CHECK_IDLE_TASK
+static bool idle_hook(void) {
+#if !CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1
+    if (xPortGetCoreID()!=0) return true;
+#endif
+    esp_task_wdt_feed();
+    return true;
+}
+#endif
+
+
+void esp_task_wdt_init() {
+    TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;
+    TIMERG0.wdt_config0.sys_reset_length=7;                 //3.2uS
+    TIMERG0.wdt_config0.cpu_reset_length=7;                 //3.2uS
+    TIMERG0.wdt_config0.level_int_en=1;
+    TIMERG0.wdt_config0.stg0=TIMG_WDT_STG_SEL_INT;          //1st stage timeout: interrupt
+    TIMERG0.wdt_config0.stg1=TIMG_WDT_STG_SEL_RESET_SYSTEM; //2nd stage timeout: reset system
+    TIMERG0.wdt_config1.clk_prescale=80*500;                //Prescaler: wdt counts in ticks of 0.5mS
+    TIMERG0.wdt_config2=CONFIG_TASK_WDT_TIMEOUT_S*2000;     //Set timeout before interrupt
+    TIMERG0.wdt_config3=CONFIG_TASK_WDT_TIMEOUT_S*4000;     //Set timeout before reset
+    TIMERG0.wdt_config0.en=1;
+    TIMERG0.wdt_feed=1;
+    TIMERG0.wdt_wprotect=0;
+#if CONFIG_TASK_WDT_CHECK_IDLE_TASK
+    esp_register_freertos_idle_hook(idle_hook);
+#endif
+    ESP_INTR_DISABLE(ETS_T0_WDT_INUM);
+    intr_matrix_set(xPortGetCoreID(), ETS_TG0_WDT_LEVEL_INTR_SOURCE, ETS_T0_WDT_INUM);
+    xt_set_interrupt_handler(ETS_T0_WDT_INUM, task_wdt_isr, NULL);
+    TIMERG0.int_clr_timers.wdt=1;
+    TIMERG0.int_ena.wdt=1;
+    ESP_INTR_ENABLE(ETS_T0_WDT_INUM);
+}
+
+
+#endif