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Merge branch 'master' into feature/cmake

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This commit is contained in:
Angus Gratton
2018-09-06 20:23:04 +08:00
committed by Angus Gratton
parent c1b8949a1e affe75a102
commit cff2ef695a
261 changed files with 3487 additions and 85171 deletions
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8
components/esp32/esp_err_to_name.c
View File

@@ -4,6 +4,9 @@
#if __has_include("soc/soc.h")
#include "soc/soc.h"
#endif
#if __has_include("apps/ping/esp_ping.h")
#include "apps/ping/esp_ping.h"
#endif
#if __has_include("esp32/ulp.h")
#include "esp32/ulp.h"
#endif
@@ -25,9 +28,6 @@
#if __has_include("esp_ota_ops.h")
#include "esp_ota_ops.h"
#endif
#if __has_include("esp_ping.h")
#include "esp_ping.h"
#endif
#if __has_include("esp_spi_flash.h")
#include "esp_spi_flash.h"
#endif
@@ -399,7 +399,7 @@ static const esp_err_msg_t esp_err_msg_table[] = {
# ifdef ESP_ERR_TCPIP_ADAPTER_DHCP_NOT_STOPPED
ERR_TBL_IT(ESP_ERR_TCPIP_ADAPTER_DHCP_NOT_STOPPED), /* 20487 0x5007 */
# endif
// components/lwip/apps/ping/esp_ping.h
// components/lwip/include/apps/ping/esp_ping.h
# ifdef ESP_ERR_PING_BASE
ERR_TBL_IT(ESP_ERR_PING_BASE), /* 24576 0x6000 */
# endif

6
components/esp32/include/esp_sleep.h
View File

@@ -319,6 +319,12 @@ esp_deep_sleep_wake_stub_fn_t esp_get_deep_sleep_wake_stub(void);
*/
void esp_default_wake_deep_sleep(void);
/**
* @brief Disable logging from the ROM code after deep sleep.
*
* Using LSB of RTC_STORE4.
*/
void esp_deep_sleep_disable_rom_logging(void);
#ifdef __cplusplus
}

3
components/esp32/include/rom/rtc.h
View File

@@ -55,7 +55,7 @@ extern "C" {
* RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value
* RTC_CNTL_STORE2_REG Boot time, low word
* RTC_CNTL_STORE3_REG Boot time, high word
* RTC_CNTL_STORE4_REG External XTAL frequency
* RTC_CNTL_STORE4_REG External XTAL frequency. The frequency must necessarily be even, otherwise there will be a conflict with the low bit, which is used to disable logs in the ROM code.
* RTC_CNTL_STORE5_REG APB bus frequency
* RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY
* RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC
@@ -71,6 +71,7 @@ extern "C" {
#define RTC_RESET_CAUSE_REG RTC_CNTL_STORE6_REG
#define RTC_MEMORY_CRC_REG RTC_CNTL_STORE7_REG
#define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code.
typedef enum {
AWAKE = 0, //<CPU ON

10
components/esp32/sleep_modes.c
View File

@@ -658,3 +658,13 @@ static uint32_t get_power_down_flags()
}
return pd_flags;
}
void esp_deep_sleep_disable_rom_logging(void)
{
/* To disable logging in the ROM, only the least significant bit of the register is used,
* but since this register is also used to store the frequency of the main crystal (RTC_XTAL_FREQ_REG),
* you need to write to this register in the same format.
* Namely, the upper 16 bits and lower should be the same.
*/
REG_SET_BIT(RTC_CNTL_STORE4_REG, RTC_DISABLE_ROM_LOG);
}

6
components/esp32/system_api.c
View File

@@ -149,7 +149,7 @@ esp_err_t esp_efuse_mac_get_default(uint8_t* mac)
esp_err_t system_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
esp_err_t esp_efuse_read_mac(uint8_t *mac) __attribute__((alias("esp_efuse_mac_get_default")));
esp_err_t esp_derive_mac(uint8_t* local_mac, const uint8_t* universal_mac)
esp_err_t esp_derive_local_mac(uint8_t* local_mac, const uint8_t* universal_mac)
{
uint8_t idx;
@@ -203,7 +203,7 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
mac[5] += 1;
}
else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
esp_derive_mac(mac, efuse_mac);
esp_derive_local_mac(mac, efuse_mac);
}
break;
case ESP_MAC_BT:
@@ -222,7 +222,7 @@ esp_err_t esp_read_mac(uint8_t* mac, esp_mac_type_t type)
}
else if (UNIVERSAL_MAC_ADDR_NUM == TWO_UNIVERSAL_MAC_ADDR) {
efuse_mac[5] += 1;
esp_derive_mac(mac, efuse_mac);
esp_derive_local_mac(mac, efuse_mac);
}
break;
default: