feat(esp_eth): a new folder structure of the driver and other improvements

Fixed memory leak in emac_esp_new_dma function.

Polished ESP EMAC cache management.

Added emac_periph definitions based on SoC features and improved(generalized) ESP EMAC GPIO
initialization.

Added ESP EMAC GPIO reservation.

Added check for frame error condition indicated by EMAC DMA and created a target test.
This commit is contained in:
Ondrej Kosta
2024-04-26 12:27:54 +02:00
parent ee8a9e8410
commit d15a9c2c48
63 changed files with 2068 additions and 1442 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -207,12 +207,12 @@
#define TWAI0_STANDBY_PAD_OUT_IDX 105
#define PWM1_CAP2_PAD_IN_IDX 106
#define TWAI1_STANDBY_PAD_OUT_IDX 106
#define GMII_MDI_PAD_IN_IDX 107
#define MII_MDI_PAD_IN_IDX 107
#define TWAI2_STANDBY_PAD_OUT_IDX 107
#define GMAC_PHY_COL_PAD_IN_IDX 108
#define GMII_MDC_PAD_OUT_IDX 108
#define GMAC_PHY_CRS_PAD_IN_IDX 109
#define GMII_MDO_PAD_OUT_IDX 109
#define EMAC_PHY_COL_PAD_IN_IDX 108
#define MII_MDC_PAD_OUT_IDX 108
#define EMAC_PHY_CRS_PAD_IN_IDX 109
#define MII_MDO_PAD_OUT_IDX 109
#define USB_OTG11_IDDIG_PAD_IN_IDX 110
#define USB_SRP_DISCHRGVBUS_PAD_OUT_IDX 110
#define USB_OTG11_AVALID_PAD_IN_IDX 111
@@ -339,21 +339,21 @@
#define LCD_DATA_OUT_PAD_OUT22_IDX 176
#define CAM_DATA_IN_PAD_IN15_IDX 177
#define LCD_DATA_OUT_PAD_OUT23_IDX 177
#define GMAC_PHY_RXDV_PAD_IN_IDX 178
#define GMAC_PHY_TXEN_PAD_OUT_IDX 178
#define GMAC_PHY_RXD0_PAD_IN_IDX 179
#define GMAC_PHY_TXD0_PAD_OUT_IDX 179
#define GMAC_PHY_RXD1_PAD_IN_IDX 180
#define GMAC_PHY_TXD1_PAD_OUT_IDX 180
#define GMAC_PHY_RXD2_PAD_IN_IDX 181
#define GMAC_PHY_TXD2_PAD_OUT_IDX 181
#define GMAC_PHY_RXD3_PAD_IN_IDX 182
#define GMAC_PHY_TXD3_PAD_OUT_IDX 182
#define GMAC_PHY_RXER_PAD_IN_IDX 183
#define GMAC_PHY_TXER_PAD_OUT_IDX 183
#define GMAC_RX_CLK_PAD_IN_IDX 184
#define EMAC_PHY_RXDV_PAD_IN_IDX 178
#define EMAC_PHY_TXEN_PAD_OUT_IDX 178
#define EMAC_PHY_RXD0_PAD_IN_IDX 179
#define EMAC_PHY_TXD0_PAD_OUT_IDX 179
#define EMAC_PHY_RXD1_PAD_IN_IDX 180
#define EMAC_PHY_TXD1_PAD_OUT_IDX 180
#define EMAC_PHY_RXD2_PAD_IN_IDX 181
#define EMAC_PHY_TXD2_PAD_OUT_IDX 181
#define EMAC_PHY_RXD3_PAD_IN_IDX 182
#define EMAC_PHY_TXD3_PAD_OUT_IDX 182
#define EMAC_PHY_RXER_PAD_IN_IDX 183
#define EMAC_PHY_TXER_PAD_OUT_IDX 183
#define EMAC_RX_CLK_PAD_IN_IDX 184
#define DBG_CH0_CLK_IDX 184
#define GMAC_TX_CLK_PAD_IN_IDX 185
#define EMAC_TX_CLK_PAD_IN_IDX 185
#define DBG_CH1_CLK_IDX 185
#define PARLIO_RX_CLK_PAD_IN_IDX 186
#define PARLIO_RX_CLK_PAD_OUT_IDX 186