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https://github.com/espressif/esp-idf.git
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fix(freertos): Incorrect assert in FreeRTOS port layer when not in ISR context
This commit fixes an issue where in the FreeRTOS port layer would cause the portASSERT_IF_IN_ISR() assert check to fail even when the system is not in an interrupt context.
This commit is contained in:
@@ -166,6 +166,13 @@ void vPortClearInterruptMaskFromISR(UBaseType_t prev_int_level);
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*/
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BaseType_t xPortInIsrContext(void);
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/**
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* @brief Assert if in ISR context
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*
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* - Asserts on xPortInIsrContext() internally
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*/
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void vPortAssertIfInISR(void);
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/**
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* @brief Check if in ISR context from High priority ISRs
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*
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@@ -478,6 +485,11 @@ void vPortTCBPreDeleteHook( void *pxTCB );
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#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level) vPortClearInterruptMaskFromISR(prev_level)
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/**
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* @brief Assert if in ISR context
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*/
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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/**
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* @brief Used by FreeRTOS functions to call the correct version of critical section API
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*/
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@@ -462,6 +462,12 @@ BaseType_t xPortInIsrContext(void)
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#endif /* (configNUM_CORES > 1) */
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}
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void vPortAssertIfInISR(void)
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{
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/* Assert if the interrupt nesting count is > 0 */
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configASSERT(xPortInIsrContext() == 0);
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}
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BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
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{
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/* Return the interrupt nesting counter for this core */
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@@ -141,12 +141,9 @@ typedef uint32_t TickType_t;
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BaseType_t xPortInIsrContext(void);
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/**
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* @brief Asserts if in ISR context
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* @brief Assert if in ISR context
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*
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* - Asserts on xPortInIsrContext() internally
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*
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* @note [refactor-todo] Check if this API is still required
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* @note [refactor-todo] Check if this should be inlined
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*/
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void vPortAssertIfInISR(void);
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@@ -427,6 +424,9 @@ void vPortTCBPreDeleteHook( void *pxTCB );
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#define portSET_INTERRUPT_MASK_FROM_ISR() xPortSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR(prev_level) vPortClearInterruptMaskFromISR(prev_level)
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/**
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* @brief Assert if in ISR context
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*/
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#define portASSERT_IF_IN_ISR() vPortAssertIfInISR()
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/**
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@@ -8,7 +8,7 @@
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*
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* SPDX-License-Identifier: MIT
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*
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* SPDX-FileContributor: 2023 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileContributor: 2023-2024 Espressif Systems (Shanghai) CO LTD
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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@@ -395,7 +395,7 @@ StackType_t * pxPortInitialiseStack( StackType_t * pxTopOfStack,
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| Coproc Save Area | (CPSA MUST BE FIRST)
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| ------------------------- |
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| TLS Variables |
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| ------------------------- | <- Start of useable stack
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| ------------------------- | <- Start of usable stack
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| Starting stack frame |
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| ------------------------- | <- pxTopOfStack on return (which is the tasks current SP)
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| | |
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@@ -449,7 +449,8 @@ BaseType_t xPortInIsrContext(void)
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void vPortAssertIfInISR(void)
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{
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configASSERT(xPortInIsrContext());
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/* Assert if the interrupt nesting count is > 0 */
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configASSERT(xPortInIsrContext() == 0);
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}
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BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void)
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@@ -489,7 +490,7 @@ BaseType_t __attribute__((optimize("-O3"))) xPortEnterCriticalTimeout(portMUX_TY
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void __attribute__((optimize("-O3"))) vPortExitCritical(portMUX_TYPE *mux)
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{
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/* This function may be called in a nested manner. Therefore, we only need
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* to reenable interrupts if this is the last call to exit the critical. We
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* to re-enable interrupts if this is the last call to exit the critical. We
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* can use the nesting count to determine whether this is the last exit call.
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*/
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spinlock_release(mux);
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