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refactor(rng): refactor to use hal/ll apis for c61

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This commit is contained in:
Armando
2025-02-17 15:38:23 +08:00
committed by armando
parent 877057db3d
commit d598c9db7c
6 changed files with 215 additions and 114 deletions
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102
components/hal/esp32c61/include/hal/adc_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -224,6 +224,15 @@ static inline void adc_ll_digi_set_pattern_table(adc_unit_t adc_n, uint32_t patt
}
}
/**
* Rest pattern table to default value
*/
static inline void adc_ll_digi_reset_pattern_table(void)
{
ADC.saradc_sar_patt_tab1.saradc_sar_patt_tab1 = 0xffffff;
ADC.saradc_sar_patt_tab2.saradc_sar_patt_tab2 = 0xffffff;
}
/**
* Reset the pattern table pointer, then take the measurement rule from table header in next measurement.
*
@@ -616,6 +625,97 @@ static inline void adc_ll_set_controller(adc_unit_t adc_n, adc_ll_controller_t c
//Not used on ESP32C61
}
/*---------------------------------------------------------------
Calibration
---------------------------------------------------------------*/
/**
* Set the calibration result to ADC.
*
* @note Different ADC units and different attenuation options use different calibration data (initial data).
*
* @param adc_n ADC index number.
* @param param calibration param
*/
__attribute__((always_inline))
static inline void adc_ll_set_calibration_param(adc_unit_t adc_n, uint32_t param)
{
uint8_t msb = param >> 8;
uint8_t lsb = param & 0xFF;
if (adc_n == ADC_UNIT_1) {
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_HIGH_ADDR, msb);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR1_INITIAL_CODE_LOW_ADDR, lsb);
} else {
//C61 doesn't support ADC2, here is for backward compatibility for RNG
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_HIGH_ADDR, msb);
REGI2C_WRITE_MASK(I2C_SAR_ADC, ADC_SAR2_INITIAL_CODE_LOW_ADDR, lsb);
}
}
/**
* Set the SAR DTEST param
*
* @param param DTEST value
*/
__attribute__((always_inline))
static inline void adc_ll_set_dtest_param(uint32_t param)
{
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_DTEST , param);
}
/**
* Set the SAR ENT param
*
* @param param ENT value
*/
__attribute__((always_inline))
static inline void adc_ll_set_ent_param(uint32_t param)
{
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC_ENT_SAR, param);
}
/**
* Enable the SAR TOUT bus
*
* @param adc_n ADC index number.
* @param en true for enable
*/
__attribute__((always_inline))
static inline void adc_ll_enable_encal_ref(adc_unit_t adc_n, bool en)
{
//C61 doesn't support ADC2, here is for backward compatibility for RNG
if (adc_n == ADC_UNIT_1) {
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC1_ENCAL_REF, en);
} else {
REGI2C_WRITE_MASK(I2C_SAR_ADC, I2C_SARADC2_ENCAL_REF, en);
}
}
__attribute__((always_inline))
/**
* Prepare regi2c SARADC registers
*/
static inline void adc_ll_regi2c_adc_prepare(void)
{
adc_ll_set_dtest_param(0);
adc_ll_set_ent_param(1);
// Config ADC circuit (Analog part) with I2C(HOST ID 0x69) and chose internal voltage as sampling source
adc_ll_enable_encal_ref(ADC_UNIT_1, true);
adc_ll_enable_encal_ref(ADC_UNIT_2, true);
}
/**
* Reset regi2c SARADC registers
*/
__attribute__((always_inline))
static inline void adc_ll_regi2c_adc_reset(void)
{
adc_ll_set_dtest_param(0);
adc_ll_set_ent_param(0);
adc_ll_enable_encal_ref(ADC_UNIT_1, false);
adc_ll_enable_encal_ref(ADC_UNIT_2, false);
}
/*---------------------------------------------------------------
Oneshot Read
---------------------------------------------------------------*/

35
components/hal/esp32c61/include/hal/regi2c_ctrl_ll.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2024-2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -10,6 +10,7 @@
#include <stdint.h>
#include "soc/soc.h"
#include "soc/regi2c_defs.h"
#include "soc/pmu_reg.h"
#include "modem/modem_lpcon_struct.h"
#include "modem/modem_syscon_struct.h"
#include "soc/i2c_ana_mst_reg.h"
@@ -111,6 +112,38 @@ static inline void regi2c_ctrl_ll_i2c_saradc_disable(void)
// TODO: IDF-9322
}
/**
* @brief Enable regi2c controlled periph registers
*/
static inline void regi2c_ctrl_ll_i2c_periph_enable(void)
{
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
}
/**
* @brief Disable regi2c controlled periph registers
*/
static inline void regi2c_ctrl_ll_i2c_periph_disable(void)
{
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_XPD_PERIF_I2C);
}
/**
* @brief Set regi2c reset
*/
static inline void regi2c_ctrl_ll_i2c_reset_set(void)
{
SET_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
}
/**
* @brief Clear regi2c reset
*/
static inline void regi2c_ctrl_ll_i2c_reset_clear(void)
{
CLEAR_PERI_REG_MASK(PMU_RF_PWC_REG, PMU_PERIF_I2C_RSTB);
}
#ifdef __cplusplus
}
#endif