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spi_flash: bringup for esp32c6

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This commit is contained in:
Cao Sen Miao
2022-10-20 13:59:08 +08:00
parent bdefd7fb6b
commit d9f01ed43c
18 changed files with 128 additions and 118 deletions
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12
components/bootloader_support/bootloader_flash/src/bootloader_flash_config_esp32c6.c
View File

@@ -55,15 +55,3 @@ void IRAM_ATTR bootloader_flash_clock_config(const esp_image_header_t *pfhdr)
}
esp_rom_spiflash_config_clk(spi_clk_div, 0);
}
void IRAM_ATTR bootloader_flash_set_dummy_out(void)
{
REG_SET_BIT(SPI_MEM_CTRL_REG(0), /*SPI_MEM_FDUMMY_OUT |*/ SPI_MEM_D_POL | SPI_MEM_Q_POL); // TODO: IDF-5631 ESP32C6 not have SPI_MEM_FDUMMY_OUT
REG_SET_BIT(SPI_MEM_CTRL_REG(1), /*SPI_MEM_FDUMMY_OUT |*/ SPI_MEM_D_POL | SPI_MEM_Q_POL); // TODO: idf-5631 ESP32C6 not have SPI_MEM_FDUMMY_OUT
}
void IRAM_ATTR bootloader_flash_dummy_config(const esp_image_header_t *pfhdr)
{
bootloader_configure_spi_pins(1);
bootloader_flash_set_dummy_out();
}

16
components/bootloader_support/bootloader_flash/src/flash_qio_mode.c
View File

@@ -102,18 +102,20 @@ void bootloader_enable_qio_mode(void)
static void s_flash_set_qio_pins(void)
{
#if SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
#if CONFIG_IDF_TARGET_ESP32
const uint32_t spiconfig = esp_rom_efuse_get_flash_gpio_info();
int wp_pin = bootloader_flash_get_wp_pin();
esp_rom_spiflash_select_qio_pins(wp_pin, spiconfig);
#elif CONFIG_IDF_TARGET_ESP32C2 || CONFIG_IDF_TARGET_ESP32C6 // TODO: IDF-5649 Add a soc_caps
esp_rom_spiflash_select_qio_pins(bootloader_flash_get_wp_pin(), esp_rom_efuse_get_flash_gpio_info());
#else
esp_rom_spiflash_select_qio_pins(esp_rom_efuse_get_flash_wp_gpio(), esp_rom_efuse_get_flash_gpio_info());
#endif // CONFIG_IDF_TARGET_ESP32
#else
// ESP32C2/ESP32C6 doesn't support configure mspi pins. So the second
// parameter is set to 0, means that chip uses default SPI pins
// and wp_gpio_num parameter(the first parameter) is ignored.
esp_rom_spiflash_select_qio_pins(0, 0);
#else
esp_rom_spiflash_select_qio_pins(esp_rom_efuse_get_flash_wp_gpio(), esp_rom_efuse_get_flash_gpio_info());
#endif
#endif // SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE
}