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spi: refactor spi_common dma allocator

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This commit is contained in:
Armando
2021-02-03 15:14:17 +08:00
committed by bot
parent c8d9ed1f3d
commit db3bf8b544
15 changed files with 233 additions and 334 deletions
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237
components/driver/spi_common.c
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@@ -31,22 +31,11 @@
#include "stdatomic.h"
#include "hal/spi_hal.h"
#include "esp_rom_gpio.h"
#if CONFIG_IDF_TARGET_ESP32
#include "soc/dport_reg.h"
#endif
//This GDMA related part will be introduced by GDMA dedicated APIs in the future. Here we temporarily use macros.
#if SOC_GDMA_SUPPORTED
#include "esp_private/gdma.h"
#include "hal/gdma_ll.h"
#include "soc/gdma_channel.h"
#include "soc/spi_caps.h"
#define spi_dma_set_rx_channel_priority(gdma_chan, priority) gdma_ll_rx_set_priority(&GDMA, gdma_chan, priority);
#define spi_dma_set_tx_channel_priority(gdma_chan, priority) gdma_ll_tx_set_priority(&GDMA, gdma_chan, priority);
#define spi_dma_connect_rx_channel_to_periph(gdma_chan, periph_id) gdma_ll_rx_connect_to_periph(&GDMA, gdma_chan, periph_id);
#define spi_dma_connect_tx_channel_to_periph(gdma_chan, periph_id) gdma_ll_tx_connect_to_periph(&GDMA, gdma_chan, periph_id);
#endif
static const char *SPI_TAG = "spi";
@@ -64,12 +53,18 @@ static const char *SPI_TAG = "spi";
SPI_CHECK(GPIO_IS_VALID_GPIO(pin_num), pin_name" not valid", ESP_ERR_INVALID_ARG); \
}
typedef struct spi_device_t spi_device_t;
#define MAIN_BUS_DEFAULT() { \
.host_id = 0, \
.bus_attr = { \
.tx_dma_chan = 0, \
.rx_dma_chan = 0, \
.max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE, \
.dma_desc_num= 0, \
}, \
}
#define FUNC_GPIO PIN_FUNC_GPIO
#define DMA_CHANNEL_ENABLED(dma_chan) (BIT(dma_chan-1))
typedef struct {
int host_id;
@@ -82,39 +77,35 @@ typedef struct {
#endif
} spicommon_bus_context_t;
#define MAIN_BUS_DEFAULT() { \
.host_id = 0, \
.bus_attr = { \
.tx_dma_chan = 0, \
.rx_dma_chan = 0, \
.max_transfer_sz = SOC_SPI_MAXIMUM_BUFFER_SIZE, \
.dma_desc_num= 0, \
}, \
}
//Periph 1 is 'claimed' by SPI flash code.
static atomic_bool spi_periph_claimed[SOC_SPI_PERIPH_NUM] = { ATOMIC_VAR_INIT(true), ATOMIC_VAR_INIT(false),
#if (SOC_SPI_PERIPH_NUM >= 3)
ATOMIC_VAR_INIT(false),
#endif
#if (SOC_SPI_PERIPH_NUM >= 4)
ATOMIC_VAR_INIT(false),
ATOMIC_VAR_INIT(false),
#endif
};
static const char* spi_claiming_func[3] = {NULL, NULL, NULL};
#if !SOC_GDMA_SUPPORTED
static uint8_t spi_dma_chan_enabled = 0;
static portMUX_TYPE spi_dma_spinlock = portMUX_INITIALIZER_UNLOCKED;
#endif
static const char* spi_claiming_func[3] = {NULL, NULL, NULL};
static spicommon_bus_context_t s_mainbus = MAIN_BUS_DEFAULT();
static spicommon_bus_context_t* bus_ctx[SOC_SPI_PERIPH_NUM] = {&s_mainbus};
#if CONFIG_IDF_TARGET_ESP32
//ESP32S2 does not support DMA channel auto-allocation
//Each bit stands for 1 dma channel, used for auto-alloc dma channel
static uint32_t spi_dma_channel_code;
#if !SOC_GDMA_SUPPORTED
//Each bit stands for 1 dma channel, BIT(0) should be used for SPI1
static uint8_t spi_dma_chan_enabled = 0;
static portMUX_TYPE spi_dma_spinlock = portMUX_INITIALIZER_UNLOCKED;
#endif //#if !SOC_GDMA_SUPPORTED
static inline bool is_valid_host(spi_host_device_t host)
{
#if (SOC_SPI_PERIPH_NUM == 2)
return host >= SPI1_HOST && host <= SPI2_HOST;
#elif (SOC_SPI_PERIPH_NUM == 3)
return host >= SPI1_HOST && host <= SPI3_HOST;
#endif
}
//----------------------------------------------------------alloc spi periph-------------------------------------------------------//
//Returns true if this peripheral is successfully claimed, false if otherwise.
@@ -155,37 +146,38 @@ int spicommon_irqdma_source_for_host(spi_host_device_t host)
return spi_periph_signal[host].irq_dma;
}
//----------------------------------------------------------esp32/s2 dma periph-------------------------------------------------------//
//----------------------------------------------------------alloc dma periph-------------------------------------------------------//
#if !SOC_GDMA_SUPPORTED
static inline periph_module_t get_dma_periph(int dma_chan)
{
assert(dma_chan >= 1 && dma_chan <= SOC_SPI_DMA_CHAN_NUM);
#if CONFIG_IDF_TARGET_ESP32S2
if (dma_chan == 1) {
return PERIPH_SPI2_DMA_MODULE;
} else if (dma_chan==2) {
} else if (dma_chan == 2) {
return PERIPH_SPI3_DMA_MODULE;
} else {
abort();
return -1;
}
#elif CONFIG_IDF_TARGET_ESP32
return PERIPH_SPI_DMA_MODULE;
#endif
}
static bool spicommon_dma_chan_claim(int dma_chan)
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
static bool spicommon_dma_chan_claim(int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
bool ret = false;
assert(dma_chan >= 1 && dma_chan <= SOC_SPI_DMA_CHAN_NUM);
portENTER_CRITICAL(&spi_dma_spinlock);
if ( !(spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan)) ) {
// get the channel only when it's not claimed yet.
spi_dma_chan_enabled |= DMA_CHANNEL_ENABLED(dma_chan);
bool is_used = (BIT(dma_chan) & spi_dma_chan_enabled);
if (!is_used) {
spi_dma_chan_enabled |= BIT(dma_chan);
periph_module_enable(get_dma_periph(dma_chan));
*out_actual_tx_dma_chan = dma_chan;
*out_actual_rx_dma_chan = dma_chan;
ret = true;
}
periph_module_enable(get_dma_periph(dma_chan));
portEXIT_CRITICAL(&spi_dma_spinlock);
return ret;
@@ -200,65 +192,53 @@ static void spicommon_connect_spi_and_dma(spi_host_device_t host, int dma_chan)
#endif
}
#endif //#if !SOC_GDMA_SUPPORTED
bool spicommon_dma_chan_in_use(int dma_chan)
static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
#if !SOC_GDMA_SUPPORTED
assert(dma_chan ==1 || dma_chan == 2);
return spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan);
#endif
return true;
}
//----------------------------------------------------------alloc dma periph-------------------------------------------------------//
static esp_err_t spicommon_alloc_dma(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
uint32_t actual_tx_dma_chan = 0;
uint32_t actual_rx_dma_chan = 0;
esp_err_t ret = ESP_OK;
#if !SOC_GDMA_SUPPORTED
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
if (dma_chan < 0) {
assert(is_valid_host(host_id));
#if CONFIG_IDF_TARGET_ESP32
for (int i = 0; i < SOC_SPI_DMA_CHAN_NUM; i++) {
bool is_used = BIT(i) & spi_dma_channel_code;
if (!is_used) {
spi_dma_channel_code |= BIT(i);
actual_tx_dma_chan = i+1;
actual_rx_dma_chan = i+1;
assert((dma_chan > 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN);
#elif CONFIG_IDF_TARGET_ESP32S2
assert(dma_chan == host_id || dma_chan == DMA_AUTO_CHAN);
#endif
esp_err_t ret = ESP_OK;
bool success = false;
if (dma_chan == DMA_AUTO_CHAN) {
#if CONFIG_IDF_TARGET_ESP32
for (int i = 1; i < SOC_SPI_DMA_CHAN_NUM+1; i++) {
success = spicommon_dma_chan_claim(i, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
if (success) {
break;
}
}
if (!actual_tx_dma_chan) {
SPI_CHECK(false, "no available dma channel", ESP_ERR_INVALID_STATE);
}
#elif CONFIG_IDF_TARGET_ESP32S2
//On ESP32S2, each SPI controller has its own DMA channel. So DMA channel auto-allocation is not supported
SPI_CHECK(false, "ESP32S2 does not support auto-alloc dma channel", ESP_ERR_INVALID_STATE);
//On ESP32S2, each SPI controller has its own DMA channel
success = spicommon_dma_chan_claim(host_id, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
#endif //#if CONFIG_IDF_TARGET_XXX
} else if (dma_chan > 0) {
actual_tx_dma_chan = dma_chan;
actual_rx_dma_chan = dma_chan;
} else { //dma_chan == 0
// Program won't reach here
abort();
success = spicommon_dma_chan_claim(dma_chan, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
}
bool dma_chan_claimed = spicommon_dma_chan_claim(actual_tx_dma_chan);
if (!dma_chan_claimed) {
spicommon_periph_free(host_id);
SPI_CHECK(false, "dma channel already in use", ESP_ERR_INVALID_STATE);
if (!success) {
SPI_CHECK(false, "no available dma channel", ESP_ERR_NOT_FOUND);
}
spicommon_connect_spi_and_dma(host_id, actual_tx_dma_chan);
spicommon_connect_spi_and_dma(host_id, *out_actual_tx_dma_chan);
return ret;
}
#else //SOC_GDMA_SUPPORTED
static esp_err_t spicommon_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
assert(is_valid_host(host_id));
assert(dma_chan == DMA_AUTO_CHAN);
esp_err_t ret = ESP_OK;
spicommon_bus_context_t *ctx = bus_ctx[host_id];
if (dma_chan < 0) {
if (dma_chan == DMA_AUTO_CHAN) {
gdma_channel_alloc_config_t tx_alloc_config = {
.flags.reserve_sibling = 1,
.direction = GDMA_CHANNEL_DIRECTION_TX,
@@ -277,41 +257,32 @@ static esp_err_t spicommon_alloc_dma(spi_host_device_t host_id, int dma_chan, ui
return ret;
}
if (host_id == SPI1_HOST) {
SPI_CHECK(false, "SPI1 does not support DMA mode", ESP_ERR_INVALID_STATE);
}
#if (SOC_SPI_PERIPH_NUM >= 2)
else if (host_id == SPI2_HOST) {
if (host_id == SPI2_HOST) {
gdma_connect(ctx->rx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
gdma_connect(ctx->tx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 2));
}
#endif
#if (SOC_SPI_PERIPH_NUM >= 3)
else {
//host_id == SPI3_HOST
else if (host_id == SPI3_HOST) {
gdma_connect(ctx->rx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 3));
gdma_connect(ctx->tx_channel, GDMA_MAKE_TRIGGER(GDMA_TRIG_PERIPH_SPI, 3));
}
#endif
gdma_get_channel_id(ctx->tx_channel, (int *)&actual_tx_dma_chan);
gdma_get_channel_id(ctx->rx_channel, (int *)&actual_rx_dma_chan);
} else if (dma_chan > 0) {
SPI_CHECK(false, "specifying a DMA channel is not supported, please use dma auto-alloc mode", ESP_ERR_INVALID_STATE);
} else { //dma_chan == 0
// Program won't reach here
gdma_get_channel_id(ctx->tx_channel, (int *)out_actual_tx_dma_chan);
gdma_get_channel_id(ctx->rx_channel, (int *)out_actual_rx_dma_chan);
}
#endif
*out_actual_tx_dma_chan = actual_tx_dma_chan;
*out_actual_rx_dma_chan = actual_rx_dma_chan;
return ret;
}
#endif //#if !SOC_GDMA_SUPPORTED
esp_err_t spicommon_slave_alloc_dma(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
esp_err_t spicommon_slave_dma_chan_alloc(spi_host_device_t host_id, int dma_chan, uint32_t *out_actual_tx_dma_chan, uint32_t *out_actual_rx_dma_chan)
{
assert(is_valid_host(host_id));
assert((dma_chan == 1 || dma_chan == 2 || dma_chan == DMA_AUTO_CHAN));
esp_err_t ret = ESP_OK;
uint32_t actual_tx_dma_chan = 0;
uint32_t actual_rx_dma_chan = 0;
spicommon_bus_context_t *ctx = (spicommon_bus_context_t *)calloc(1, sizeof(spicommon_bus_context_t));
if (!ctx) {
ret = ESP_ERR_NO_MEM;
@@ -320,11 +291,15 @@ esp_err_t spicommon_slave_alloc_dma(spi_host_device_t host_id, int dma_chan, uin
bus_ctx[host_id] = ctx;
ctx->host_id = host_id;
ret = spicommon_alloc_dma(host_id, dma_chan, out_actual_tx_dma_chan, out_actual_rx_dma_chan);
ret = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
if (ret != ESP_OK) {
goto cleanup;
}
ctx->bus_attr.tx_dma_chan = actual_tx_dma_chan;
ctx->bus_attr.rx_dma_chan = actual_rx_dma_chan;
*out_actual_tx_dma_chan = actual_tx_dma_chan;
*out_actual_rx_dma_chan = actual_rx_dma_chan;
return ret;
cleanup:
@@ -334,19 +309,22 @@ cleanup:
}
//----------------------------------------------------------free dma periph-------------------------------------------------------//
static esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id, int dma_chan)
static esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id)
{
assert(is_valid_host(host_id));
spicommon_bus_context_t *ctx = bus_ctx[host_id];
#if !SOC_GDMA_SUPPORTED
assert( dma_chan == 1 || dma_chan == 2 );
assert( spi_dma_chan_enabled & DMA_CHANNEL_ENABLED(dma_chan) );
//On ESP32S2, each SPI controller has its own DMA channel
int dma_chan = ctx->bus_attr.tx_dma_chan;
assert(spi_dma_chan_enabled & BIT(dma_chan));
portENTER_CRITICAL(&spi_dma_spinlock);
spi_dma_chan_enabled &= ~DMA_CHANNEL_ENABLED(dma_chan);
spi_dma_chan_enabled &= ~BIT(dma_chan);
periph_module_disable(get_dma_periph(dma_chan));
portEXIT_CRITICAL(&spi_dma_spinlock);
#else //SOC_GDMA_SUPPORTED
spicommon_bus_context_t *ctx = bus_ctx[host_id];
if (ctx->rx_channel) {
gdma_disconnect(ctx->rx_channel);
gdma_del_channel(ctx->rx_channel);
@@ -360,10 +338,11 @@ static esp_err_t spicommon_dma_chan_free(spi_host_device_t host_id, int dma_chan
return ESP_OK;
}
esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id, int dma_chan)
esp_err_t spicommon_slave_free_dma(spi_host_device_t host_id)
{
esp_err_t ret = spicommon_dma_chan_free(host_id, dma_chan);
assert(is_valid_host(host_id));
esp_err_t ret = spicommon_dma_chan_free(host_id);
free(bus_ctx[host_id]);
bus_ctx[host_id] = NULL;
@@ -628,11 +607,6 @@ spi_bus_lock_handle_t spi_bus_lock_get_by_id(spi_host_device_t host_id)
return bus_ctx[host_id]->bus_attr.lock;
}
static inline bool is_valid_host(spi_host_device_t host)
{
return host >= SPI1_HOST && host <= SPI3_HOST;
}
//----------------------------------------------------------master bus init-------------------------------------------------------//
esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *bus_config, int dma_chan)
{
@@ -645,11 +619,11 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
SPI_CHECK(is_valid_host(host_id), "invalid host_id", ESP_ERR_INVALID_ARG);
SPI_CHECK(bus_ctx[host_id] == NULL, "SPI bus already initialized.", ESP_ERR_INVALID_STATE);
#ifdef CONFIG_IDF_TARGET_ESP32
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == -1, "invalid dma channel", ESP_ERR_INVALID_ARG );
SPI_CHECK( (dma_chan >= 0 && dma_chan <= 2) || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif CONFIG_IDF_TARGET_ESP32S2
SPI_CHECK( dma_chan == 0 || dma_chan == host_id, "invalid dma channel", ESP_ERR_INVALID_ARG );
SPI_CHECK( dma_chan == 0 || dma_chan == host_id || dma_chan == DMA_AUTO_CHAN, "invalid dma channel", ESP_ERR_INVALID_ARG );
#elif SOC_GDMA_SUPPORTED
SPI_CHECK( dma_chan == 0 || dma_chan == -1, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
SPI_CHECK( dma_chan == 0 || dma_chan == DMA_AUTO_CHAN, "invalid dma channel, chip only support spi dma channel auto-alloc", ESP_ERR_INVALID_ARG );
#endif
SPI_CHECK((bus_config->intr_flags & (ESP_INTR_FLAG_HIGH|ESP_INTR_FLAG_EDGE|ESP_INTR_FLAG_INTRDISABLED))==0, "intr flag not allowed", ESP_ERR_INVALID_ARG);
#ifndef CONFIG_SPI_MASTER_ISR_IN_IRAM
@@ -673,7 +647,7 @@ esp_err_t spi_bus_initialize(spi_host_device_t host_id, const spi_bus_config_t *
if (dma_chan != 0) {
bus_attr->dma_enabled = 1;
err = spicommon_alloc_dma(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
err = spicommon_dma_chan_alloc(host_id, dma_chan, &actual_tx_dma_chan, &actual_rx_dma_chan);
if (err != ESP_OK) {
goto cleanup;
}
@@ -731,10 +705,10 @@ cleanup:
}
free(bus_attr->dmadesc_tx);
free(bus_attr->dmadesc_rx);
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
bus_attr->dmadesc_tx = NULL;
bus_attr->dmadesc_rx = NULL;
if (bus_attr->dma_enabled) {
spicommon_dma_chan_free(host_id, actual_tx_dma_chan);
spicommon_dma_chan_free(host_id);
}
}
spicommon_periph_free(host_id);
@@ -766,17 +740,14 @@ esp_err_t spi_bus_free(spi_host_device_t host_id)
esp_pm_lock_delete(bus_attr->pm_lock);
#endif
spi_bus_deinit_lock(bus_attr->lock);
free(bus_attr->dmadesc_rx);
free(bus_attr->dmadesc_tx);
//On ESP32 and ESP32S2, actual_tx_dma_chan and actual_rx_dma_chan are always same
bus_attr->dmadesc_tx = NULL;
bus_attr->dmadesc_rx = NULL;
if (bus_attr->dma_enabled > 0) {
spicommon_dma_chan_free (host_id, bus_attr->tx_dma_chan);
spicommon_dma_chan_free(host_id);
}
spicommon_periph_free(host_id);
free(ctx);
bus_ctx[host_id] = NULL;
return err;