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refactor(esp32c61): bus_monitor backward compatible refactor

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This commit is contained in:
laokaiyao
2025-04-02 18:28:11 +08:00
parent ba0a2db037
commit db85cd02be
25 changed files with 124 additions and 39 deletions
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21
components/soc/esp32c61/include/soc/assist_debug_reg.h Normal file
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@@ -0,0 +1,21 @@
/**
* SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
#pragma once
#include "soc/bus_monitor_reg.h"
// Compatible alias
#define DR_REG_ASSIST_DEBUG_BASE DR_REG_BUS_MONITOR_BASE
#define ASSIST_DEBUG_CORE_0_DEBUG_MODE_REG BUS_MONITOR_CORE_0_DEBUG_MODE_REG
#define ASSIST_DEBUG_CORE_0_DEBUG_MODULE_ACTIVE BUS_MONITOR_CORE_0_DEBUG_MODULE_ACTIVE
#define ASSIST_DEBUG_CORE_0_SP_MIN_REG BUS_MONITOR_CORE_0_SP_MIN_REG
#define ASSIST_DEBUG_CORE_0_SP_MAX_REG BUS_MONITOR_CORE_0_SP_MAX_REG
#define ASSIST_DEBUG_CORE_0_RCD_EN_REG BUS_MONITOR_CORE_0_RCD_EN_REG
#define ASSIST_DEBUG_CORE_0_RCD_PDEBUGEN BUS_MONITOR_CORE_0_RCD_PDEBUGEN
#define ASSIST_DEBUG_CORE_0_RCD_RECORDEN BUS_MONITOR_CORE_0_RCD_RECORDEN

2
components/soc/esp32c61/ld/esp32c61.peripherals.ld
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@@ -58,6 +58,6 @@ PROVIDE ( LP_GPIO = 0x600B4400 );
PROVIDE ( EFUSE0 = 0x600B4800 );
PROVIDE ( EFUSE1 = 0x600B4C00 );
PROVIDE ( TRACE = 0x600C0000 );
PROVIDE ( ASSIST_DEBUG = 0x600C2000 );
PROVIDE ( BUS_MONITOR = 0x600C2000 );
PROVIDE ( INTPRI = 0x600C5000 );
PROVIDE ( CACHE = 0x600C8000 );

1
components/soc/esp32c61/register/soc/assist_debug_reg.h → components/soc/esp32c61/register/soc/bus_monitor_reg.h
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@@ -5,7 +5,6 @@
*/
#pragma once
#include <stdint.h>
#include "soc/soc.h"
#ifdef __cplusplus
extern "C" {

2
components/soc/esp32c61/register/soc/assist_debug_struct.h → components/soc/esp32c61/register/soc/bus_monitor_struct.h
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@@ -559,7 +559,7 @@ typedef struct {
volatile bus_monitor_date_reg_t date;
} bus_monitor_dev_t;
extern bus_monitor_dev_t ASSIST_DEBUG;
extern bus_monitor_dev_t BUS_MONITOR;
#ifndef __cplusplus
_Static_assert(sizeof(bus_monitor_dev_t) == 0x400, "Invalid size of bus_monitor_dev_t structure");

2
components/soc/esp32c61/register/soc/reg_base.h
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@@ -57,7 +57,7 @@
#define DR_REG_EFUSE0_BASE 0x600B4800
#define DR_REG_EFUSE1_BASE 0x600B4C00
#define DR_REG_TRACE_BASE 0x600C0000
#define DR_REG_ASSIST_DEBUG_BASE 0x600C2000
#define DR_REG_BUS_MONITOR_BASE 0x600C2000
#define DR_REG_INTPRI_BASE 0x600C5000
#define DR_REG_CACHE_BASE 0x600C8000
#define DR_REG_CLINT_M_BASE 0x20000000