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feat(parlio_rx): support parlio rx on p4

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This commit is contained in:
laokaiyao
2024-01-23 19:39:51 +08:00
parent 3f632df143
commit dcc7cf9379
19 changed files with 238 additions and 91 deletions
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6
examples/peripherals/.build-test-rules.yml
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@@ -261,9 +261,11 @@ examples/peripherals/parlio:
examples/peripherals/parlio/parlio_rx:
disable:
- if: SOC_PARLIO_SUPPORTED != 1 or IDF_TARGET == "esp32p4"
- if: SOC_PARLIO_SUPPORTED != 1
disable_test:
- if: IDF_TARGET == "esp32p4"
temporary: true
reason: not support esp32p4 yet (IDF-7471)
reason: lack of runner
depends_components:
- esp_driver_parlio

4
examples/peripherals/parlio/parlio_rx/logic_analyzer/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-H2 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 |
| ----------------- | -------- | -------- | -------- |
# Logic Analyzer Example

11
examples/peripherals/parlio/parlio_rx/logic_analyzer/components/esp_probe/esp_probe_private.h
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -11,6 +11,8 @@
#include "freertos/FreeRTOS.h"
#include "freertos/task.h"
#include "freertos/queue.h"
#include "soc/soc_caps.h"
#include "hal/dma_types.h"
#include "esp_heap_caps.h"
#include "esp_probe.h"
@@ -19,12 +21,17 @@ extern "C" {
#endif
#define ESP_PROBE_DEFAULT_Q_DEPTH 8
#define ESP_PROBE_DEFAULT_MAX_RECV_SIZE (ESP_PROBE_DEFAULT_Q_DEPTH * 4092)
#if SOC_CACHE_INTERNAL_MEM_VIA_L1CACHE
#define ESP_PROBE_DEFAULT_MAX_RECV_SIZE (ESP_PROBE_DEFAULT_Q_DEPTH * DMA_DESCRIPTOR_BUFFER_MAX_SIZE_64B_ALIGNED)
#else
#define ESP_PROBE_DEFAULT_MAX_RECV_SIZE (ESP_PROBE_DEFAULT_Q_DEPTH * DMA_DESCRIPTOR_BUFFER_MAX_SIZE_4B_ALIGNED)
#endif
#if CONFIG_PARLIO_ISR_IRAM_SAFE
#define ESP_PROBE_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT)
#else
#define ESP_PROBE_ALLOC_CAPS MALLOC_CAP_DEFAULT
#endif
#define ESP_PROBE_DMA_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_DMA)
struct esp_probe_t {
uint32_t sample_width; /*!< sample width, i.e., enabled probe channel nums */

11
examples/peripherals/parlio/parlio_rx/logic_analyzer/components/esp_probe/hw_impl/esp_probe_impl_parlio.c
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@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -8,8 +8,11 @@
#include <string.h>
#include "sdkconfig.h"
#include "driver/parlio_rx.h"
#include "hal/cache_hal.h"
#include "hal/cache_ll.h"
#include "esp_clk_tree.h"
#include "esp_heap_caps.h"
#include "esp_dma_utils.h"
#include "esp_check.h"
#include "esp_probe_private.h"
@@ -43,7 +46,11 @@ esp_err_t esp_probe_priv_init_hardware(esp_probe_handle_t handle, esp_probe_conf
esp_err_t ret = ESP_OK;
s_ephi = calloc(1, sizeof(esp_probe_impl_pralio_t));
ESP_RETURN_ON_FALSE(s_ephi, ESP_ERR_NO_MEM, TAG, "no memory for the esp probe hardware implementation");
s_ephi->payload = heap_caps_calloc(1, ESP_PROBE_DEFAULT_MAX_RECV_SIZE, ESP_PROBE_ALLOC_CAPS);
uint32_t alignment = cache_hal_get_cache_line_size(CACHE_LL_LEVEL_INT_MEM, CACHE_TYPE_DATA);
alignment = alignment < 4 ? 4 : alignment;
size_t payload_aligned_size = ESP_PROBE_DEFAULT_MAX_RECV_SIZE & ~(alignment - 1);
s_ephi->payload = heap_caps_aligned_calloc(alignment, 1, payload_aligned_size, ESP_PROBE_DMA_ALLOC_CAPS);
ESP_GOTO_ON_FALSE(s_ephi->payload, ESP_ERR_NO_MEM, err, TAG, "no memory for payload");
// Get the channel number, the channel number can only be the power of 2

4
examples/peripherals/parlio/parlio_tx/simple_rgb_led_matrix/README.md
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@@ -1,5 +1,5 @@
| Supported Targets | ESP32-C6 | ESP32-H2 |
| ----------------- | -------- | -------- |
| Supported Targets | ESP32-C6 | ESP32-H2 | ESP32-P4 |
| ----------------- | -------- | -------- | -------- |
# Parallel IO TX Example: Simple RGB LED Matrix