diff --git a/components/driver/test/test_spi_master.c b/components/driver/test/test_spi_master.c
index 22b1961cc0..4ae5b3de79 100644
--- a/components/driver/test/test_spi_master.c
+++ b/components/driver/test/test_spi_master.c
@@ -543,7 +543,7 @@ static const uint8_t data_drom[320+3] = {
 
 TEST_CASE("SPI Master DMA test, TX and RX in different regions", "[spi]")
 {
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     //test psram if enabled
     ESP_LOGI(TAG, "testing PSRAM...");
     uint32_t* data_malloc = (uint32_t*)heap_caps_malloc(324, MALLOC_CAP_SPIRAM);
diff --git a/components/driver/test/test_spi_slave.c b/components/driver/test/test_spi_slave.c
index 668b78d29c..da04f21101 100644
--- a/components/driver/test/test_spi_slave.c
+++ b/components/driver/test/test_spi_slave.c
@@ -11,7 +11,7 @@
 #include "sdkconfig.h"
 #include "test/test_common_spi.h"
 
-#ifndef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifndef CONFIG_SPIRAM
 //This test should be removed once the timing test is merged.
 
 
@@ -140,4 +140,4 @@ TEST_CASE("test slave send unaligned","[spi]")
     ESP_LOGI(MASTER_TAG, "test passed.");
 }
 
-#endif // !CONFIG_ESP32_SPIRAM_SUPPORT
+#endif // !CONFIG_SPIRAM
diff --git a/components/esp32/Kconfig b/components/esp32/Kconfig
index 522f8f5741..9346bd6215 100644
--- a/components/esp32/Kconfig
+++ b/components/esp32/Kconfig
@@ -24,9 +24,12 @@ menu "ESP32-specific"
         default 160 if ESP32_DEFAULT_CPU_FREQ_160
         default 240 if ESP32_DEFAULT_CPU_FREQ_240
 
+    # Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
+    # instead
     config ESP32_SPIRAM_SUPPORT
         bool "Support for external, SPI-connected RAM"
         default "n"
+        select SPIRAM
         help
             This enables support for an external SPI RAM chip, connected in parallel with the
             main SPI flash chip.
@@ -34,41 +37,6 @@ menu "ESP32-specific"
     menu "SPI RAM config"
         depends on ESP32_SPIRAM_SUPPORT
 
-        config SPIRAM_BOOT_INIT
-            bool "Initialize SPI RAM when booting the ESP32"
-            default "y"
-            help
-                If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
-                have specific requirements, you'll want to leave this enabled so memory allocated
-                during boot-up can also be placed in SPI RAM.
-
-        config SPIRAM_IGNORE_NOTFOUND
-            bool "Ignore PSRAM when not found"
-            default "n"
-            depends on SPIRAM_BOOT_INIT && !SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
-            help
-                Normally, if psram initialization is enabled during compile time but not found at runtime, it
-                is seen as an error making the ESP32 panic. If this is enabled, the ESP32 will keep on
-                running but will not add the (non-existing) RAM to any allocator.
-
-        choice SPIRAM_USE
-            prompt "SPI RAM access method"
-            default SPIRAM_USE_MALLOC
-            help
-                The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
-                memory region in the ESP32 memory map, by integrating it in the ESP32s heap as 'special' memory
-                needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
-                return SPI RAM pointers.
-
-            config SPIRAM_USE_MEMMAP
-                bool "Integrate RAM into ESP32 memory map"
-            config SPIRAM_USE_CAPS_ALLOC
-                bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPIRAM)"
-            config SPIRAM_USE_MALLOC
-                bool "Make RAM allocatable using malloc() as well"
-                select FREERTOS_SUPPORT_STATIC_ALLOCATION
-        endchoice
-
         choice SPIRAM_TYPE
             prompt "Type of SPI RAM chip in use"
             default SPIRAM_TYPE_AUTO
@@ -115,14 +83,6 @@ menu "ESP32-specific"
                 bool "80MHz clock speed"
         endchoice
 
-        config SPIRAM_MEMTEST
-            bool "Run memory test on SPI RAM initialization"
-            default "y"
-            depends on SPIRAM_BOOT_INIT
-            help
-                Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
-                slightly faster startop.
-
         config SPIRAM_CACHE_WORKAROUND
             bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
             depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
@@ -136,6 +96,9 @@ menu "ESP32-specific"
                 This will also not use any bits of newlib that are located in ROM, opting for a version that is
                 compiled with the workaround and located in flash instead.
 
+        # insert non-chip-specific items here
+        source "$IDF_PATH/components/esp_common/Kconfig.spiram.common"
+
         config SPIRAM_BANKSWITCH_ENABLE
             bool "Enable bank switching for >4MiB external RAM"
             default y
@@ -173,35 +136,6 @@ menu "ESP32-specific"
                 from the non-preferred region instead, so malloc() will not suddenly fail when either internal or
                 external memory is full.
 
-        config SPIRAM_TRY_ALLOCATE_WIFI_LWIP
-            bool "Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, allocate internal memory"
-            depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
-            default "n"
-            help
-                Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, try to allocate internal
-                memory then.
-
-        config SPIRAM_MALLOC_RESERVE_INTERNAL
-            int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
-            depends on SPIRAM_USE_MALLOC
-            default 32768
-            range 0 262144
-            help
-                Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
-                that the internal memory is entirely filled up. This causes allocations that are specifically done in
-                internal memory, for example the stack for new tasks or memory to service DMA or have memory that's
-                also available when SPI cache is down, to fail. This option reserves a pool specifically for requests
-                like that; the memory in this pool is not given out when a normal malloc() is called.
-
-                Set this to 0 to disable this feature.
-
-                Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
-                be sure to keep this in mind when adjusting this value.
-
-                Note also that the DMA reserved pool may not be one single contiguous memory region, depending on the
-                configured size and the static memory usage of the app.
-
-
         config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
             bool "Allow external memory as an argument to xTaskCreateStatic"
             default n
@@ -214,15 +148,6 @@ menu "ESP32-specific"
                 and does not call on ROM code in any way (no direct calls, but also no Bluetooth/WiFi), you can try to
                 disable this and use xTaskCreateStatic to create the tasks stack in external memory.
 
-        config SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
-            bool "Allow .bss segment placed in external memory"
-            default n
-            depends on ESP32_SPIRAM_SUPPORT
-            help
-                If enabled the option,and add EXT_RAM_ATTR defined your variable,then your variable will be placed in
-                PSRAM instead of internal memory, and placed most of variables of lwip,net802.11,pp,bluedroid library
-                to external memory defaultly.
-
         choice SPIRAM_OCCUPY_SPI_HOST
             prompt "SPI host to use for 32MBit PSRAM"
             default SPIRAM_OCCUPY_VSPI_HOST
diff --git a/components/esp32/sleep_modes.c b/components/esp32/sleep_modes.c
index 04179d3791..b702f500a3 100644
--- a/components/esp32/sleep_modes.c
+++ b/components/esp32/sleep_modes.c
@@ -302,7 +302,7 @@ esp_err_t esp_light_sleep_start()
     const uint32_t flash_enable_time_us = VDD_SDIO_POWERUP_TO_FLASH_READ_US
                                           + CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY;
 
-#ifndef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifndef CONFIG_SPIRAM
     const uint32_t vddsdio_pd_sleep_duration = MAX(FLASH_PD_MIN_SLEEP_TIME_US,
             flash_enable_time_us + LIGHT_SLEEP_TIME_OVERHEAD_US + LIGHT_SLEEP_MIN_TIME_US);
 
@@ -310,7 +310,7 @@ esp_err_t esp_light_sleep_start()
         pd_flags |= RTC_SLEEP_PD_VDDSDIO;
         s_config.sleep_time_adjustment += flash_enable_time_us;
     }
-#endif //CONFIG_ESP32_SPIRAM_SUPPORT
+#endif //CONFIG_SPIRAM
 
     rtc_vddsdio_config_t vddsdio_config = rtc_vddsdio_get_config();
 
diff --git a/components/esp32/spiram.c b/components/esp32/spiram.c
index fc4a9a619f..207f3a43ed 100644
--- a/components/esp32/spiram.c
+++ b/components/esp32/spiram.c
@@ -46,7 +46,7 @@ we add more types of external RAM memory, this can be made into a more intellige
 #endif
 #endif
 
-#if CONFIG_ESP32_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
 
 static const char* TAG = "spiram";
 
diff --git a/components/esp32/spiram_psram.c b/components/esp32/spiram_psram.c
index 5e536400b6..873c8ce439 100644
--- a/components/esp32/spiram_psram.c
+++ b/components/esp32/spiram_psram.c
@@ -36,7 +36,7 @@
 #include "driver/periph_ctrl.h"
 #include "bootloader_common.h"
 
-#if CONFIG_ESP32_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
 #include "soc/rtc.h"
 
 //Commands for PSRAM chip
@@ -845,4 +845,4 @@ static void IRAM_ATTR psram_cache_init(psram_cache_mode_t psram_cache_mode, psra
     CLEAR_PERI_REG_MASK(SPI_PIN_REG(0), SPI_CS1_DIS_M); //ENABLE SPI0 CS1 TO PSRAM(CS0--FLASH; CS1--SRAM)
 }
 
-#endif // CONFIG_ESP32_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
diff --git a/components/esp32/test/test_4mpsram.c b/components/esp32/test/test_4mpsram.c
index da173a19bf..b61383be3b 100644
--- a/components/esp32/test/test_4mpsram.c
+++ b/components/esp32/test/test_4mpsram.c
@@ -6,7 +6,7 @@
 
 static const char TAG[] = "test_psram";
 
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
 static void test_psram_content()
 {
     const int test_size = 2048;
@@ -40,7 +40,7 @@ static void test_psram_content()
 TEST_CASE("can use spi when not being used by psram", "[psram_4m]")
 {
     spi_host_device_t host;
-#if !CONFIG_ESP32_SPIRAM_SUPPORT || !CONFIG_SPIRAM_SPEED_80M || CONFIG_SPIRAM_BANKSWITCH_ENABLE
+#if !CONFIG_SPIRAM || !CONFIG_SPIRAM_SPEED_80M || CONFIG_SPIRAM_BANKSWITCH_ENABLE
     //currently all 8M psram don't need more SPI peripherals
     host = -1;
 #elif CONFIG_SPIRAM_OCCUPY_HSPI_HOST
@@ -66,7 +66,7 @@ TEST_CASE("can use spi when not being used by psram", "[psram_4m]")
         TEST_ASSERT(claim_vspi==true);
     }
 
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     test_psram_content();
 #endif
 }
diff --git a/components/esp32/test/test_spiram_cache_flush.c b/components/esp32/test/test_spiram_cache_flush.c
index d0797a2871..5f1e8762e1 100644
--- a/components/esp32/test/test_spiram_cache_flush.c
+++ b/components/esp32/test/test_spiram_cache_flush.c
@@ -21,7 +21,7 @@ This code tests the interaction between PSRAM and SPI flash routines.
 #include "esp_partition.h"
 #include "test_utils.h"
 
-#if CONFIG_ESP32_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
 
 #if CONFIG_SPIRAM_USE_CAPS_ALLOC || CONFIG_SPIRAM_USE_MALLOC
 #define USE_CAPS_ALLOC 1
@@ -179,4 +179,4 @@ IRAM_ATTR TEST_CASE("Spiram memcmp weirdness at 80MHz", "[spiram]") {
 #endif
 }
 
-#endif // CONFIG_ESP32_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
diff --git a/components/esp32s2beta/Kconfig b/components/esp32s2beta/Kconfig
index 0f4da7ff40..93faf43eee 100644
--- a/components/esp32s2beta/Kconfig
+++ b/components/esp32s2beta/Kconfig
@@ -129,9 +129,12 @@ menu "ESP32S2-specific"
 
     endmenu  # Cache config
 
+    # Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM
+    # instead
     config ESP32S2_SPIRAM_SUPPORT
         bool "Support for external, SPI-connected RAM"
         default "n"
+        select SPIRAM
         help
             This enables support for an external SPI RAM chip, connected in parallel with the
             main SPI flash chip.
@@ -139,41 +142,6 @@ menu "ESP32S2-specific"
     menu "SPI RAM config"
         depends on ESP32S2_SPIRAM_SUPPORT
 
-        config SPIRAM_BOOT_INIT
-            bool "Initialize SPI RAM when booting the ESP32"
-            default "y"
-            help
-                If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
-                have specific requirements, you'll want to leave this enabled so memory allocated
-                during boot-up can also be placed in SPI RAM.
-
-        config SPIRAM_IGNORE_NOTFOUND
-            bool "Ignore PSRAM when not found"
-            default "n"
-            depends on SPIRAM_BOOT_INIT
-            help
-                Normally, if psram initialization is enabled during compile time but not found at runtime, it
-                is seen as an error making the ESP32 panic. If this is enabled, the ESP32 will keep on
-                running but will not add the (non-existing) RAM to any allocator.
-
-        choice SPIRAM_USE
-            prompt "SPI RAM access method"
-            default SPIRAM_USE_MALLOC
-            help
-                The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
-                memory region in the ESP32 memory map, by integrating it in the ESP32s heap as 'special' memory
-                needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
-                return SPI RAM pointers.
-
-            config SPIRAM_USE_MEMMAP
-                bool "Integrate RAM into ESP32 memory map"
-            config SPIRAM_USE_CAPS_ALLOC
-                bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPIRAM)"
-            config SPIRAM_USE_MALLOC
-                bool "Make RAM allocatable using malloc() as well"
-                select SUPPORT_STATIC_ALLOCATION
-        endchoice
-
         choice SPIRAM_TYPE
             prompt "Type of SPI RAM chip in use"
             default SPIRAM_TYPE_AUTO
@@ -195,6 +163,9 @@ menu "ESP32S2-specific"
             default 8388608 if SPIRAM_TYPE_ESPPSRAM64
             default 0
 
+        # insert non-chip-specific items here
+        source "$IDF_PATH/components/esp_common/Kconfig.spiram.common"
+
         config SPIRAM_FETCH_INSTRUCTIONS
             bool "Cache fetch instructions from SPI RAM"
             default n
@@ -240,79 +211,6 @@ menu "ESP32S2-specific"
                 bool "80MHz clock speed"
         endchoice
 
-        config SPIRAM_MEMTEST
-            bool "Run memory test on SPI RAM initialization"
-            default "y"
-            depends on SPIRAM_BOOT_INIT
-            help
-                Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
-                slightly faster startop.
-
-        config SPIRAM_CACHE_WORKAROUND
-            bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
-            depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
-            default "y"
-            help
-                Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
-                when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
-                fix in the compiler (-mfix-esp32-psram-cache-issue) that makes sure the specific code that is
-                vulnerable to this will not be emitted.
-
-                This will also not use any bits of newlib that are located in ROM, opting for a version that is
-                compiled with the workaround and located in flash instead.
-
-        config SPIRAM_MALLOC_ALWAYSINTERNAL
-            int "Maximum malloc() size, in bytes, to always put in internal memory"
-            depends on SPIRAM_USE_MALLOC
-            default 16384
-            range 0 131072
-            help
-                If malloc() is capable of also allocating SPI-connected ram, its allocation strategy will prefer to
-                allocate chunks less than this size in internal memory, while allocations larger than this will be
-                done from external RAM. If allocation from the preferred region fails, an attempt is made to allocate
-                from the non-preferred region instead, so malloc() will not suddenly fail when either internal or
-                external memory is full.
-
-        config SPIRAM_TRY_ALLOCATE_WIFI_LWIP
-            bool "Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, allocate internal memory"
-            depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
-            default "n"
-            help
-                Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, try to allocate internal
-                memory then.
-
-        config SPIRAM_MALLOC_RESERVE_INTERNAL
-            int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
-            depends on SPIRAM_USE_MALLOC
-            default 32768
-            range 0 262144
-            help
-                Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
-                that the internal memory is entirely filled up. This causes allocations that are specifically done in
-                internal memory, for example the stack for new tasks or memory to service DMA or have memory that's
-                also available when SPI cache is down, to fail. This option reserves a pool specifically for requests
-                like that; the memory in this pool is not given out when a normal malloc() is called.
-
-                Set this to 0 to disable this feature.
-
-                Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
-                be sure to keep this in mind when adjusting this value.
-
-                Note also that the DMA reserved pool may not be one single contiguous memory region, depending on the
-                configured size and the static memory usage of the app.
-
-        config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
-            bool "Allow external memory as an argument to xTaskCreateStatic"
-            default n
-            depends on SPIRAM_USE_MALLOC
-            help
-                Because some bits of the ESP32 code environment cannot be recompiled with the cache workaround,
-                normally tasks cannot be safely run with their stack residing in external memory; for this reason
-                xTaskCreate and friends always allocate stack in internal memory and xTaskCreateStatic will check if
-                the memory passed to it is in internal memory. If you have a task that needs a large amount of stack
-                and does not call on ROM code in any way (no direct calls, but also no Bluetooth/WiFi), you can try to
-                disable this and use xTaskCreateStatic to create the tasks stack in external memory.
-
     endmenu
 
     config ESP32S2_MEMMAP_TRACEMEM
diff --git a/components/esp32s2beta/spiram.c b/components/esp32s2beta/spiram.c
index 3ecc4ea39f..338691977f 100644
--- a/components/esp32s2beta/spiram.c
+++ b/components/esp32s2beta/spiram.c
@@ -44,7 +44,7 @@ we add more types of external RAM memory, this can be made into a more intellige
 #endif
 #endif
 
-#if CONFIG_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
 
 static const char* TAG = "spiram";
 
diff --git a/components/esp32s2beta/spiram_psram.c b/components/esp32s2beta/spiram_psram.c
index d1ba2ca2bc..b6b3f3b47b 100644
--- a/components/esp32s2beta/spiram_psram.c
+++ b/components/esp32s2beta/spiram_psram.c
@@ -37,7 +37,7 @@
 #include "driver/spi_common.h"
 #include "driver/periph_ctrl.h"
 
-#if CONFIG_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
 #include "soc/rtc.h"
 
 //Commands for PSRAM chip
@@ -900,4 +900,4 @@ static void IRAM_ATTR psram_cache_init(psram_cache_mode_t psram_cache_mode, psra
         SET_PERI_REG_BITS(SPI_MEM_CTRL2_REG(0), SPI_MEM_CS_HOLD_TIME_V, 1, SPI_MEM_CS_HOLD_TIME_S);
     }
 }
-#endif // CONFIG_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
diff --git a/components/esp_common/Kconfig.spiram.common b/components/esp_common/Kconfig.spiram.common
new file mode 100644
index 0000000000..f71f6624a4
--- /dev/null
+++ b/components/esp_common/Kconfig.spiram.common
@@ -0,0 +1,99 @@
+# Common (non-chip-specific) SPIRAM options
+#
+# sourced into the "SPIRAM config" submenu for ESP32 or ESP32S2
+
+# invisible option selected by ESP32_SPIRAM_SUPPORT || ESP32S2_SPIRAM_SUPPORT
+config SPIRAM
+    bool
+
+config SPIRAM_BOOT_INIT
+    bool "Initialize SPI RAM during startup"
+    default "y"
+    help
+        If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
+        have specific requirements, you'll want to leave this enabled so memory allocated
+        during boot-up can also be placed in SPI RAM.
+
+config SPIRAM_IGNORE_NOTFOUND
+    bool "Ignore PSRAM when not found"
+    default "n"
+    depends on SPIRAM_BOOT_INIT && !SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
+    help
+        Normally, if psram initialization is enabled during compile time but not found at runtime, it
+        is seen as an error making the CPU panic. If this is enabled, booting will complete
+        but no PSRAM will be available.
+
+choice SPIRAM_USE
+    prompt "SPI RAM access method"
+    default SPIRAM_USE_MALLOC
+    help
+        The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
+        memory region in the CPU's memory map, by integrating it in the heap as 'special' memory
+        needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
+        return SPI RAM pointers.
+
+    config SPIRAM_USE_MEMMAP
+        bool "Integrate RAM into memory map"
+    config SPIRAM_USE_CAPS_ALLOC
+        bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPIRAM)"
+    config SPIRAM_USE_MALLOC
+        bool "Make RAM allocatable using malloc() as well"
+        select FREERTOS_SUPPORT_STATIC_ALLOCATION
+endchoice
+
+config SPIRAM_MEMTEST
+    bool "Run memory test on SPI RAM initialization"
+    default "y"
+    depends on SPIRAM_BOOT_INIT
+    help
+        Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
+        slightly faster startup.
+
+config SPIRAM_MALLOC_ALWAYSINTERNAL
+    int "Maximum malloc() size, in bytes, to always put in internal memory"
+    depends on SPIRAM_USE_MALLOC
+    default 16384
+    range 0 131072
+    help
+        If malloc() is capable of also allocating SPI-connected ram, its allocation strategy will prefer to
+        allocate chunks less than this size in internal memory, while allocations larger than this will be
+        done from external RAM. If allocation from the preferred region fails, an attempt is made to allocate
+        from the non-preferred region instead, so malloc() will not suddenly fail when either internal or
+        external memory is full.
+
+config SPIRAM_TRY_ALLOCATE_WIFI_LWIP
+    bool "Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, allocate internal memory"
+    depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
+    default "n"
+    help
+        Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, try to allocate internal
+        memory then.
+
+config SPIRAM_MALLOC_RESERVE_INTERNAL
+    int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
+    depends on SPIRAM_USE_MALLOC
+    default 32768
+    range 0 262144
+    help
+        Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
+        that the internal memory is entirely filled up. This causes allocations that are specifically done in
+        internal memory, for example the stack for new tasks or memory to service DMA or have memory that's
+        also available when SPI cache is down, to fail. This option reserves a pool specifically for requests
+        like that; the memory in this pool is not given out when a normal malloc() is called.
+
+        Set this to 0 to disable this feature.
+
+        Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
+        be sure to keep this in mind when adjusting this value.
+
+        Note also that the DMA reserved pool may not be one single contiguous memory region, depending on the
+        configured size and the static memory usage of the app.
+
+config SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY
+    bool "Allow .bss segment placed in external memory"
+    default n
+    depends on SPIRAM
+    help
+        If enabled the option,and add EXT_RAM_ATTR defined your variable,then your variable will be placed in
+        PSRAM instead of internal memory, and placed most of variables of lwip,net802.11,pp,bluedroid library
+        to external memory defaultly.
diff --git a/components/esp_event/test/test_event.c b/components/esp_event/test/test_event.c
index 0efc2d4920..d058f0b804 100644
--- a/components/esp_event/test/test_event.c
+++ b/components/esp_event/test/test_event.c
@@ -863,11 +863,11 @@ static void performance_test(bool dedicated_task)
     // Enabling profiling will slow down event dispatch, so the set threshold
     // is not valid when it is enabled.
 #else
-#ifndef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifndef CONFIG_SPIRAM
     TEST_PERFORMANCE_GREATER_THAN(EVENT_DISPATCH, "%d", average);
 #else
     TEST_PERFORMANCE_GREATER_THAN(EVENT_DISPATCH_PSRAM, "%d", average);
-#endif // CONFIG_ESP32_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
 #endif // CONFIG_ESP_EVENT_LOOP_PROFILING
 }
 
diff --git a/components/ethernet/emac_main.c b/components/ethernet/emac_main.c
index 89046e8899..48e26a302a 100644
--- a/components/ethernet/emac_main.c
+++ b/components/ethernet/emac_main.c
@@ -1113,7 +1113,7 @@ esp_err_t esp_eth_init_internal(eth_config_t *config)
     periph_module_enable(PERIPH_EMAC_MODULE);
 
     if (emac_config.clock_mode != ETH_CLOCK_GPIO0_IN) {
-#if CONFIG_ESP32_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
         if (esp_spiram_is_initialized()) {
             ESP_LOGE(TAG, "GPIO16 and GPIO17 has been occupied by PSRAM, Only ETH_CLOCK_GPIO_IN is supported!");
             ret = ESP_FAIL;
diff --git a/components/freertos/port.c b/components/freertos/port.c
index 6e99de3c05..35e16c8c74 100644
--- a/components/freertos/port.c
+++ b/components/freertos/port.c
@@ -440,7 +440,7 @@ void vPortSetStackWatchpoint( void* pxStackStart ) {
 	esp_set_watchpoint(1, (char*)addr, 32, ESP_WATCHPOINT_STORE);
 }
 
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_SPIRAM)
 /*
  * Compare & set (S32C1) does not work in external RAM. Instead, this routine uses a mux (in internal memory) to fake it.
  */
@@ -464,7 +464,7 @@ void uxPortCompareSetExtram(volatile uint32_t *addr, uint32_t compare, uint32_t
 	vPortCPUReleaseMutexIntsDisabled(&extram_mux);
 #endif
 }
-#endif //defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#endif //defined(CONFIG_SPIRAM)
 
 
 
diff --git a/components/freertos/portmux_impl.h b/components/freertos/portmux_impl.h
index 5aef351b63..c261bc0c1d 100644
--- a/components/freertos/portmux_impl.h
+++ b/components/freertos/portmux_impl.h
@@ -64,7 +64,7 @@
 #undef PORTMUX_COMPARE_SET_FN_NAME
 
 
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_SPIRAM)
 
 #define PORTMUX_AQUIRE_MUX_FN_NAME vPortCPUAcquireMutexIntsDisabledExtram
 #define PORTMUX_RELEASE_MUX_FN_NAME vPortCPUReleaseMutexIntsDisabledExtram
@@ -91,7 +91,7 @@
 
 
 static inline bool __attribute__((always_inline)) vPortCPUAcquireMutexIntsDisabled(PORTMUX_AQUIRE_MUX_FN_ARGS) {
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_SPIRAM)
 	if (esp_ptr_external_ram(mux)) {
 		return vPortCPUAcquireMutexIntsDisabledExtram(PORTMUX_AQUIRE_MUX_FN_CALL_ARGS(mux));
 	}
@@ -101,7 +101,7 @@ static inline bool __attribute__((always_inline)) vPortCPUAcquireMutexIntsDisabl
 
 
 static inline void vPortCPUReleaseMutexIntsDisabled(PORTMUX_RELEASE_MUX_FN_ARGS) {
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_SPIRAM)
 	if (esp_ptr_external_ram(mux)) {
 		vPortCPUReleaseMutexIntsDisabledExtram(PORTMUX_RELEASE_MUX_FN_CALL_ARGS(mux));
 		return;
diff --git a/components/freertos/test/test_spinlocks.c b/components/freertos/test/test_spinlocks.c
index a54908f33c..58ef373710 100644
--- a/components/freertos/test/test_spinlocks.c
+++ b/components/freertos/test/test_spinlocks.c
@@ -45,7 +45,7 @@ TEST_CASE("portMUX spinlocks (no contention)", "[freertos]")
 #ifdef CONFIG_FREERTOS_UNICORE
     TEST_PERFORMANCE_LESS_THAN(FREERTOS_SPINLOCK_CYCLES_PER_OP_UNICORE, "%d cycles/op", ((end - start)/REPEAT_OPS));
 #else
-#if CONFIG_ESP32_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
     TEST_PERFORMANCE_LESS_THAN(FREERTOS_SPINLOCK_CYCLES_PER_OP_PSRAM, "%d cycles/op", ((end - start)/REPEAT_OPS));
 #else
     TEST_PERFORMANCE_LESS_THAN(FREERTOS_SPINLOCK_CYCLES_PER_OP, "%d cycles/op", ((end - start)/REPEAT_OPS));
diff --git a/components/newlib/test/test_newlib.c b/components/newlib/test/test_newlib.c
index 12a10e4d53..41f72329bf 100644
--- a/components/newlib/test/test_newlib.c
+++ b/components/newlib/test/test_newlib.c
@@ -125,14 +125,14 @@ static bool fn_in_rom(void *fn, const char *name)
 
 TEST_CASE("check if ROM or Flash is used for functions", "[newlib]")
 {
-#if defined(CONFIG_NEWLIB_NANO_FORMAT) && !defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_NEWLIB_NANO_FORMAT) && !defined(CONFIG_SPIRAM)
     TEST_ASSERT(fn_in_rom(printf, "printf"));
     TEST_ASSERT(fn_in_rom(sscanf, "sscanf"));
 #else
     TEST_ASSERT_FALSE(fn_in_rom(printf, "printf"));
     TEST_ASSERT_FALSE(fn_in_rom(sscanf, "sscanf"));
 #endif
-#if !defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if !defined(CONFIG_SPIRAM)
     TEST_ASSERT(fn_in_rom(atoi,   "atoi"));
     TEST_ASSERT(fn_in_rom(strtol, "strtol"));
 #else
diff --git a/components/pthread/pthread.c b/components/pthread/pthread.c
index 84997c9aad..0efbeaf3a7 100644
--- a/components/pthread/pthread.c
+++ b/components/pthread/pthread.c
@@ -504,13 +504,13 @@ int pthread_once(pthread_once_t *once_control, void (*init_routine)(void))
     }
 
     uint32_t res = 1;
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_SPIRAM)
     if (esp_ptr_external_ram(once_control)) {
         uxPortCompareSetExtram((uint32_t *) &once_control->init_executed, 0, &res);
     } else {
 #endif
         uxPortCompareSet((uint32_t *) &once_control->init_executed, 0, &res);
-#if defined(CONFIG_ESP32_SPIRAM_SUPPORT)
+#if defined(CONFIG_SPIRAM)
     }
 #endif
     // Check if compare and set was successful
diff --git a/components/sdmmc/test/test_sd.c b/components/sdmmc/test/test_sd.c
index b1b418c95c..fe746f6d7c 100644
--- a/components/sdmmc/test/test_sd.c
+++ b/components/sdmmc/test/test_sd.c
@@ -28,7 +28,7 @@
 #include <unistd.h>
 
 // Can't test eMMC (slot 0) and PSRAM together
-#ifndef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifndef CONFIG_SPIRAM
 #define WITH_EMMC_TEST
 #endif
 
diff --git a/components/soc/esp32/soc_memory_layout.c b/components/soc/esp32/soc_memory_layout.c
index b3c7cae3fb..3070e86bbd 100644
--- a/components/soc/esp32/soc_memory_layout.c
+++ b/components/soc/esp32/soc_memory_layout.c
@@ -60,7 +60,7 @@ const soc_memory_type_desc_t soc_memory_types[] = {
     { "PID5DRAM", { MALLOC_CAP_PID5|MALLOC_CAP_INTERNAL, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT|MALLOC_CAP_DEFAULT }, false, false},
     { "PID6DRAM", { MALLOC_CAP_PID6|MALLOC_CAP_INTERNAL, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT|MALLOC_CAP_DEFAULT }, false, false},
     { "PID7DRAM", { MALLOC_CAP_PID7|MALLOC_CAP_INTERNAL, MALLOC_CAP_8BIT, MALLOC_CAP_32BIT|MALLOC_CAP_DEFAULT }, false, false},
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     //Type 15: SPI SRAM data
     { "SPIRAM", { MALLOC_CAP_SPIRAM|MALLOC_CAP_DEFAULT, 0, MALLOC_CAP_8BIT|MALLOC_CAP_32BIT}, false, false},
 #endif
@@ -75,7 +75,7 @@ Because of requirements in the coalescing code which merges adjacent regions, th
 from low to high start address.
 */
 const soc_memory_region_t soc_memory_regions[] = {
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     { SOC_EXTRAM_DATA_LOW, CONFIG_SPIRAM_SIZE, 15, 0}, //SPI SRAM, if available
 #endif
     { 0x3FFAE000, 0x2000, 0, 0}, //pool 16 <- used for rom code
@@ -166,7 +166,7 @@ SOC_RESERVE_MEMORY_REGION(0x3fffc000, 0x40000000, trace_mem); //Reserve trace me
 #endif
 #endif
 
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
 SOC_RESERVE_MEMORY_REGION(SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_LOW + CONFIG_SPIRAM_SIZE, spi_ram); //SPI RAM gets added later if needed, in spiram.c; reserve it for now
 #endif
 
diff --git a/components/soc/esp32/test/test_rtc_clk.c b/components/soc/esp32/test/test_rtc_clk.c
index 6983035580..794312f897 100644
--- a/components/soc/esp32/test/test_rtc_clk.c
+++ b/components/soc/esp32/test/test_rtc_clk.c
@@ -218,7 +218,7 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
     printf("Test passed successfully\n");
 }
 
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
 // PSRAM tests run on ESP-WROVER-KIT boards, which have the 32k XTAL installed.
 // Other tests may run on DevKitC boards, which don't have a 32k XTAL.
 TEST_CASE("Test starting external RTC quartz", "[rtc_clk]")
@@ -284,4 +284,4 @@ TEST_CASE("Test starting 'External 32kHz XTAL' on the board without it.", "[rtc_
     start_freq(RTC_SLOW_FREQ_RTC, 0);
 }
 
-#endif // CONFIG_ESP32_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
diff --git a/components/soc/esp32s2beta/soc_memory_layout.c b/components/soc/esp32s2beta/soc_memory_layout.c
index 73e7ed3728..6826bafb36 100644
--- a/components/soc/esp32s2beta/soc_memory_layout.c
+++ b/components/soc/esp32s2beta/soc_memory_layout.c
@@ -67,7 +67,7 @@ Because of requirements in the coalescing code which merges adjacent regions, th
 from low to high start address.
 */
 const soc_memory_region_t soc_memory_regions[] = {
-#ifdef CONFIG_ESP32S2_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     { SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH - SOC_EXTRAM_DATA_LOW, 4, 0}, //SPI SRAM, if available
 #if CONFIG_USE_AHB_DBUS3_ACCESS_SPIRAM
     { SOC_SLOW_EXTRAM_DATA_LOW, SOC_SLOW_EXTRAM_DATA_HIGH - SOC_SLOW_EXTRAM_DATA_LOW, 5, 0}, //SPI SRAM, if available
@@ -135,7 +135,7 @@ const soc_reserved_region_t soc_reserved_regions[] = {
 #endif
 #endif
 
-#ifdef CONFIG_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     { SOC_EXTRAM_DATA_LOW, SOC_EXTRAM_DATA_HIGH}, //SPI RAM gets added later if needed, in spiram.c; reserve it for now
 #if CONFIG_USE_AHB_DBUS3_ACCESS_SPIRAM
     { SOC_SLOW_EXTRAM_DATA_LOW, SOC_SLOW_EXTRAM_DATA_HIGH}, //SPI RAM(Slow) gets added later if needed, in spiram.c; reserve it for now
diff --git a/components/soc/esp32s2beta/test/test_rtc_clk.c b/components/soc/esp32s2beta/test/test_rtc_clk.c
index 53b437881d..850c5be9ad 100644
--- a/components/soc/esp32s2beta/test/test_rtc_clk.c
+++ b/components/soc/esp32s2beta/test/test_rtc_clk.c
@@ -214,7 +214,7 @@ static void start_freq(rtc_slow_freq_t required_src_freq, uint32_t start_delay_m
     printf("Test passed successfully\n");
 }
 
-#ifdef CONFIG_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
 // PSRAM tests run on ESP-WROVER-KIT boards, which have the 32k XTAL installed.
 // Other tests may run on DevKitC boards, which don't have a 32k XTAL.
 TEST_CASE("Test starting external RTC quartz", "[rtc_clk]")
@@ -280,5 +280,5 @@ TEST_CASE("Test starting 'External 32kHz XTAL' on the board without it.", "[rtc_
     start_freq(RTC_SLOW_FREQ_RTC, 0);
 }
 
-#endif // CONFIG_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
 #endif
diff --git a/components/soc/include/soc/soc_memory_layout.h b/components/soc/include/soc/soc_memory_layout.h
index f9240848aa..6cc73023dd 100644
--- a/components/soc/include/soc/soc_memory_layout.h
+++ b/components/soc/include/soc/soc_memory_layout.h
@@ -163,7 +163,7 @@ inline static bool IRAM_ATTR esp_ptr_byte_accessible(const void *p)
     intptr_t ip = (intptr_t) p;
     bool r;
     r = (ip >= SOC_BYTE_ACCESSIBLE_LOW && ip < SOC_BYTE_ACCESSIBLE_HIGH);
-#if CONFIG_ESP32_SPIRAM_SUPPORT && CONFIG_SPIRAM_SIZE
+#if CONFIG_SPIRAM && CONFIG_SPIRAM_SIZE
     // ToDo: Use SOC_EXTRAM_DATA_HIGH if CONFIG_SPIRAM_SIZE is -1 (ie max possible SPIRAM size)
     r |= (ip >= SOC_EXTRAM_DATA_LOW && ip < (SOC_EXTRAM_DATA_LOW + CONFIG_SPIRAM_SIZE));
 #endif
diff --git a/components/spi_flash/flash_mmap.c b/components/spi_flash/flash_mmap.c
index 8058251e3c..ef30bc4bc7 100644
--- a/components/spi_flash/flash_mmap.c
+++ b/components/spi_flash/flash_mmap.c
@@ -263,11 +263,9 @@ esp_err_t IRAM_ATTR spi_flash_mmap_pages(const int *pages, size_t page_count, sp
        entire cache.
     */
     if (need_flush) {
-#if CONFIG_ESP32_SPIRAM_SUPPORT
-#if CONFIG_IDF_TARGET_ESP32
+#if CONFIG_SPIRAM
         esp_spiram_writeback_cache();
 #endif
-#endif
 #if CONFIG_IDF_TARGET_ESP32
         Cache_Flush(0);
 #elif CONFIG_IDF_TARGET_ESP32S2BETA
@@ -473,14 +471,12 @@ IRAM_ATTR bool spi_flash_check_and_flush_cache(size_t start_addr, size_t length)
         }
 
         if (is_page_mapped_in_cache(page)) {
-#if CONFIG_IDF_TARGET_ESP32
-#if CONFIG_ESP32_SPIRAM_SUPPORT
+#if CONFIG_SPIRAM
             esp_spiram_writeback_cache();
 #endif
             Cache_Flush(0);
 #ifndef CONFIG_FREERTOS_UNICORE
             Cache_Flush(1);
-#endif
 #endif
             return true;
         }
diff --git a/components/spi_flash/test/test_read_write.c b/components/spi_flash/test/test_read_write.c
index ecc7e23c49..3311cb813f 100644
--- a/components/spi_flash/test/test_read_write.c
+++ b/components/spi_flash/test/test_read_write.c
@@ -218,7 +218,7 @@ TEST_CASE("Test spi_flash_write", "[spi_flash]")
     ESP_ERROR_CHECK(spi_flash_write(start, (char *) 0x40080000, 16));
 }
 
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
 
 TEST_CASE("spi_flash_read can read into buffer in external RAM", "[spi_flash]")
 {
@@ -264,4 +264,4 @@ TEST_CASE("spi_flash_write can write from external RAM buffer", "[spi_flash]")
     free(buf_int);
 }
 
-#endif // CONFIG_ESP32_SPIRAM_SUPPORT
+#endif // CONFIG_SPIRAM
diff --git a/components/vfs/test/test_vfs_fd.c b/components/vfs/test/test_vfs_fd.c
index 3f76f36ae2..75be13a654 100644
--- a/components/vfs/test/test_vfs_fd.c
+++ b/components/vfs/test/test_vfs_fd.c
@@ -260,7 +260,7 @@ TEST_CASE("Open & write & close through VFS passes performance test", "[vfs]")
     const int64_t time_diff_us = esp_timer_get_time() - begin;
     const int ns_per_iter = (int) (time_diff_us * 1000 / iter_count);
     TEST_ESP_OK( esp_vfs_unregister(VFS_PREF1) );
-#ifdef CONFIG_ESP32_SPIRAM_SUPPORT
+#ifdef CONFIG_SPIRAM
     TEST_PERFORMANCE_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME_PSRAM, "%dns", ns_per_iter);
 #else
     TEST_PERFORMANCE_LESS_THAN(VFS_OPEN_WRITE_CLOSE_TIME, "%dns", ns_per_iter);