feat(glitch_filter): support GPIO glitch filter on esp32p4

This commit is contained in:
morris
2024-03-22 11:29:34 +08:00
parent f71044c877
commit ddece8f7e9
6 changed files with 94 additions and 7 deletions

View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -14,6 +14,12 @@
#include "driver/dedic_gpio.h"
#include "soc/soc_caps.h"
#if CONFIG_IDF_TARGET_ESP32P4
#define TEST_FILTER_GPIO 20
#else
#define TEST_FILTER_GPIO 2
#endif
#if SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER
TEST_CASE("GPIO pin glitch filter life cycle", "[gpio_filter]")
@@ -108,7 +114,7 @@ NOINLINE_ATTR IRAM_ATTR static void test_gpio_simulate_glitch_pulse(void)
TEST_CASE("GPIO flex glitch filter enable/disable", "[gpio_filter]")
{
const gpio_num_t test_gpio = 2;
const gpio_num_t test_gpio = TEST_FILTER_GPIO;
printf("initialize GPIO for input and out\r\n");
gpio_config_t gpio_cfg = {

View File

@@ -1,6 +1,5 @@
# SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
# SPDX-License-Identifier: CC0-1.0
import pytest
from pytest_embedded_idf import IdfDut
@@ -16,6 +15,7 @@ CONFIGS = [
@pytest.mark.esp32h2
@pytest.mark.esp32s2
@pytest.mark.esp32s3
@pytest.mark.esp32p4
@pytest.mark.generic
@pytest.mark.parametrize('config', CONFIGS, indirect=True)
def test_gpio_filter(dut: IdfDut) -> None: