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change(soc): added SOC_ prefix to mmu defs

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Armando
2023-08-31 12:28:04 +08:00
parent a9e3f963c2
commit de77ab3061
44 changed files with 550 additions and 621 deletions
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22
components/hal/esp32/include/hal/cache_ll.h
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@@ -98,22 +98,22 @@ static inline cache_bus_mask_t cache_ll_l1_get_bus(uint32_t cache_id, uint32_t v
cache_bus_mask_t mask = 0;
uint32_t vaddr_end = vaddr_start + len - 1;
if (vaddr_start >= IROM0_CACHE_ADDRESS_HIGH) {
if (vaddr_start >= SOC_IROM0_CACHE_ADDRESS_HIGH) {
HAL_ASSERT(false); //out of range
} else if (vaddr_start >= IROM0_CACHE_ADDRESS_LOW) {
} else if (vaddr_start >= SOC_IROM0_CACHE_ADDRESS_LOW) {
mask |= CACHE_BUS_IBUS2;
} else if (vaddr_start >= IRAM1_CACHE_ADDRESS_LOW) {
} else if (vaddr_start >= SOC_IRAM1_CACHE_ADDRESS_LOW) {
mask |= CACHE_BUS_IBUS1;
mask |= (vaddr_end >= IROM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS2 : 0;
} else if (vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) {
mask |= (vaddr_end >= SOC_IROM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS2 : 0;
} else if (vaddr_start >= SOC_IRAM0_CACHE_ADDRESS_LOW) {
mask |= CACHE_BUS_IBUS0;
mask |= (vaddr_end >= IRAM1_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS1 : 0;
mask |= (vaddr_end >= IROM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS2 : 0;
} else if (vaddr_start >= DRAM1_CACHE_ADDRESS_LOW) {
HAL_ASSERT(vaddr_end < DRAM1_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
mask |= (vaddr_end >= SOC_IRAM1_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS1 : 0;
mask |= (vaddr_end >= SOC_IROM0_CACHE_ADDRESS_LOW) ? CACHE_BUS_IBUS2 : 0;
} else if (vaddr_start >= SOC_DRAM1_CACHE_ADDRESS_LOW) {
HAL_ASSERT(vaddr_end < SOC_DRAM1_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
mask |= CACHE_BUS_DBUS1;
} else if (vaddr_start >= DROM0_CACHE_ADDRESS_LOW) {
HAL_ASSERT(vaddr_end < DROM0_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
} else if (vaddr_start >= SOC_DROM0_CACHE_ADDRESS_LOW) {
HAL_ASSERT(vaddr_end < SOC_DROM0_CACHE_ADDRESS_HIGH); //out of range, vaddr should be consecutive, see `ext_mem_defs.h`
mask |= CACHE_BUS_DBUS0;
} else {
HAL_ASSERT(false);