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Merge branch 'feat/p4_rev3_isp_blc' into 'master'

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isp: black level correction driver support on p4 eco5

Closes IDF-13931

See merge request espressif/esp-idf!41714
This commit is contained in:
Armando (Dou Yiwen)
2025-09-24 01:10:40 +00:00
parent 8bb5f0292a 7a58274c73
commit e13699a652
15 changed files with 516 additions and 16 deletions
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104
components/hal/esp32p4/include/hal/isp_ll.h
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@@ -860,6 +860,110 @@ static inline void isp_ll_bf_set_template(isp_dev_t *hw, uint8_t template_arr[SO
hw->bf_gau1.gau_template22 = template_arr[2][2];
}
/*---------------------------------------------------------------
BLC
---------------------------------------------------------------*/
/**
* @brief Set BLC clock control mode
*
* @param[in] hw Hardware instance address
* @param[in] mode 'isp_ll_pipeline_clk_ctrl_t`
*/
static inline void isp_ll_blc_set_clk_ctrl_mode(isp_dev_t *hw, isp_ll_pipeline_clk_ctrl_t mode)
{
hw->clk_en.clk_blc_force_on = mode;
}
/**
* @brief Enable / Disable BLC
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
*/
static inline void isp_ll_blc_enable(isp_dev_t *hw, bool enable)
{
hw->cntl.blc_en = enable;
}
/**
* @brief Set BLC correction offset
*
* @param[in] hw Hardware instance address
* @param[in] top_left_chan_offset Correction offset for top left channel of the raw Bayer image
* @param[in] top_right_chan_offset Correction offset for top right channel of the raw Bayer image
* @param[in] bottom_left_chan_offset Correction offset for bottom left channel of the raw Bayer image
* @param[in] bottom_right_chan_offset Correction offset for bottom right channel of the raw Bayer image
*/
static inline void isp_ll_blc_set_correction_offset(isp_dev_t *hw, uint32_t top_left_chan_offset, uint32_t top_right_chan_offset, uint32_t bottom_left_chan_offset, uint32_t bottom_right_chan_offset)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_value, blc_r0_value, top_left_chan_offset);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_value, blc_r1_value, top_right_chan_offset);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_value, blc_r2_value, bottom_left_chan_offset);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_value, blc_r3_value, bottom_right_chan_offset);
}
/**
* @brief Enable / Disable BLC stretch
*
* @param[in] hw Hardware instance address
* @param[in] top_left_chan_stretch_en Enable / Disable stretch for top left channel of the raw Bayer image
* @param[in] top_right_chan_stretch_en Enable / Disable stretch for top right channel of the raw Bayer image
* @param[in] bottom_left_chan_stretch_en Enable / Disable stretch for bottom left channel of the raw Bayer image
* @param[in] bottom_right_chan_stretch_en Enable / Disable stretch for bottom right channel of the raw Bayer image
*/
static inline void isp_ll_blc_enable_stretch(isp_dev_t *hw, bool top_left_chan_stretch_en, bool top_right_chan_stretch_en, bool bottom_left_chan_stretch_en, bool bottom_right_chan_stretch_en)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl0, blc_r0_stretch, top_left_chan_stretch_en);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl0, blc_r1_stretch, top_right_chan_stretch_en);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl0, blc_r2_stretch, bottom_left_chan_stretch_en);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl0, blc_r3_stretch, bottom_right_chan_stretch_en);
}
/**
* @brief Set BLC window
*
* @param[in] hw Hardware instance address
* @param[in] x_start X start position
* @param[in] y_start Y start position
* @param[in] x_size X size
* @param[in] y_size Y size
*/
static inline void isp_ll_blc_set_window(isp_dev_t *hw, uint32_t x_start, uint32_t y_start, uint32_t x_size, uint32_t y_size)
{
hw->blc_ctrl1.blc_window_top = y_start;
hw->blc_ctrl1.blc_window_left = x_start;
hw->blc_ctrl1.blc_window_vnum = y_size;
hw->blc_ctrl1.blc_window_hnum = x_size;
}
/**
* @brief Set BLC filter threshold
*
* @param[in] hw Hardware instance address
* @param[in] top_left_chan_thresh Filter threshold for top left channel of the raw Bayer image
* @param[in] top_right_chan_thresh Filter threshold for top right channel of the raw Bayer image
* @param[in] bottom_left_chan_thresh Filter threshold for bottom left channel of the raw Bayer image
* @param[in] bottom_right_chan_thresh Filter threshold for bottom right channel of the raw Bayer image
*/
static inline void isp_ll_blc_set_filter_threshold(isp_dev_t *hw, uint32_t top_left_chan_thresh, uint32_t top_right_chan_thresh, uint32_t bottom_left_chan_thresh, uint32_t bottom_right_chan_thresh)
{
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl2, blc_r0_th, top_left_chan_thresh);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl2, blc_r1_th, top_right_chan_thresh);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl2, blc_r2_th, bottom_left_chan_thresh);
HAL_FORCE_MODIFY_U32_REG_FIELD(hw->blc_ctrl2, blc_r3_th, bottom_right_chan_thresh);
}
/**
* @brief Enable / Disable BLC filter
*
* @param[in] hw Hardware instance address
* @param[in] enable Enable / Disable
*/
static inline void isp_ll_blc_enable_filter(isp_dev_t *hw, bool enable)
{
hw->blc_ctrl1.blc_filter_en = enable;
}
/*---------------------------------------------------------------
CCM
---------------------------------------------------------------*/