alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2025-09-01 14:34:31 +00:00
Code Issues Packages Projects Releases Wiki Activity

fix(soc): change debug addr range to CPU subsystem range

Browse Source 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
This commit is contained in:
Mahavir Jain
2024-01-16 13:22:57 +05:30
parent 4ecc978bd6
commit e173895618
6 changed files with 34 additions and 29 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
components/esp_gdbstub/src/port/riscv/include/esp_gdbstub_memory_regions.h
View File

@@ -1,5 +1,5 @@
/*
* SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
*
* SPDX-License-Identifier: Apache-2.0
*/
@@ -26,8 +26,13 @@ static inline bool __is_valid_memory_region(intptr_t addr)
(addr >= SOC_RTC_IRAM_LOW && addr < SOC_RTC_IRAM_HIGH) ||
/* RTC DRAM and RTC DATA are identical with RTC IRAM, hence we skip them */
#endif
(addr >= SOC_PERIPHERAL_LOW && addr < SOC_PERIPHERAL_HIGH) ||
(addr >= SOC_DEBUG_LOW && addr < SOC_DEBUG_HIGH);
#if defined(SOC_DEBUG_LOW) && defined(SOC_DEBUG_HIGH)
(addr >= SOC_DEBUG_LOW && addr < SOC_DEBUG_HIGH) ||
#endif
#if defined(SOC_CPU_SUBSYSTEM_LOW) && defined(SOC_CPU_SUBSYSTEM_HIGH)
(addr >= SOC_CPU_SUBSYSTEM_LOW && addr < SOC_CPU_SUBSYSTEM_HIGH) ||
#endif
(addr >= SOC_PERIPHERAL_LOW && addr < SOC_PERIPHERAL_HIGH);
}
static inline bool is_valid_memory_region(intptr_t addr)