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Merge branch 'refactor/esp_hw_support_cpu' into 'master'

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esp_hw_support: Add new esp_cpu.h abstraction

Closes IDF-4769

See merge request espressif/esp-idf!17091
This commit is contained in:
Darian
2022-06-14 21:11:30 +08:00
parent b20aa0612b a8a3756b38
commit e213e66ba3
92 changed files with 2637 additions and 3804 deletions
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20
components/soc/esp32c3/include/soc/Kconfig.soc_caps.in
View File

@@ -3,10 +3,6 @@
# using gen_soc_caps_kconfig.py, do not edit manually
#####################################################
config SOC_CPU_CORES_NUM
bool
default y
config SOC_ADC_SUPPORTED
bool
default y
@@ -203,6 +199,18 @@ config SOC_SHARED_IDCACHE_SUPPORTED
bool
default y
config SOC_CPU_CORES_NUM
int
default 1
config SOC_CPU_INTR_NUM
int
default 32
config SOC_CPU_HAS_FLEXIBLE_INTC
bool
default y
config SOC_CPU_BREAKPOINTS_NUM
int
default 8
@@ -211,10 +219,6 @@ config SOC_CPU_WATCHPOINTS_NUM
int
default 8
config SOC_CPU_HAS_FLEXIBLE_INTC
bool
default y
config SOC_CPU_WATCHPOINT_SIZE
hex
default 0x80000000

7
components/soc/esp32c3/include/soc/soc_caps.h
View File

@@ -25,7 +25,6 @@
#pragma once
/*-------------------------- COMMON CAPS ---------------------------------------*/
#define SOC_CPU_CORES_NUM 1
#define SOC_ADC_SUPPORTED 1
#define SOC_DEDICATED_GPIO_SUPPORTED 1
#define SOC_GDMA_SUPPORTED 1
@@ -102,10 +101,12 @@
#define SOC_SHARED_IDCACHE_SUPPORTED 1 //Shared Cache for both instructions and data
/*-------------------------- CPU CAPS ----------------------------------------*/
#define SOC_CPU_BREAKPOINTS_NUM 8
#define SOC_CPU_WATCHPOINTS_NUM 8
#define SOC_CPU_CORES_NUM (1U)
#define SOC_CPU_INTR_NUM 32
#define SOC_CPU_HAS_FLEXIBLE_INTC 1
#define SOC_CPU_BREAKPOINTS_NUM 8
#define SOC_CPU_WATCHPOINTS_NUM 8
#define SOC_CPU_WATCHPOINT_SIZE 0x80000000 // bytes
/*-------------------------- DIGITAL SIGNATURE CAPS ----------------------------------------*/