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spi_flash: add support for 32Mbit address GD flash, for GD25Q256

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This commit is contained in:
Cao Sen Miao
2021-05-18 12:05:41 +08:00
parent ba15ac8634
commit e226a65a1f
10 changed files with 136 additions and 18 deletions
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12
components/spi_flash/include/spi_flash_chip_driver.h
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@@ -14,6 +14,7 @@
#pragma once
#include "esp_flash.h"
#include "esp_attr.h"
struct esp_flash_t;
typedef struct esp_flash_t esp_flash_t;
@@ -33,6 +34,12 @@ typedef enum {
SPI_FLASH_REG_STATUS = 1,
} spi_flash_register_t;
typedef enum {
SPI_FLASH_CHIP_CAP_SUSPEND = BIT(0), ///< Flash chip support suspend feature.
SPI_FLASH_CHIP_CAP_32MB_SUPPORT = BIT(1), ///< Flash chip driver support flash size larger than 32M Bytes.
} spi_flash_caps_t;
FLAG_ATTR(spi_flash_caps_t)
/** @brief SPI flash chip driver definition structure.
*
* The chip driver structure contains chip-specific pointers to functions to perform SPI flash operations, and some
@@ -188,6 +195,11 @@ struct spi_flash_chip_t {
/** Setup flash suspend configuration. */
esp_err_t (*sus_setup)(esp_flash_t *chip);
/**
* Get the capabilities of the flash chip. See SPI_FLASH_CHIP_CAP_* macros as reference.
*/
spi_flash_caps_t (*get_chip_caps)(esp_flash_t *chip);
};
/* Pointer to an array of pointers to all known drivers for flash chips. This array is used