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spi_flash: add support for 32Mbit address GD flash, for GD25Q256
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@@ -463,6 +463,20 @@ esp_err_t spi_flash_chip_generic_set_io_mode(esp_flash_t *chip)
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}
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#endif // CONFIG_SPI_FLASH_ROM_IMPL
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spi_flash_caps_t spi_flash_chip_generic_get_caps(esp_flash_t *chip)
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{
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// For generic part flash capability, take the XMC chip as reference.
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spi_flash_caps_t caps_flags = 0;
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// 32M-bits address support
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// flash suspend support
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// Only `XMC` support suspend for now.
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if (chip->chip_id >> 16 == 0x20) {
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caps_flags |= SPI_FLASH_CHIP_CAP_SUSPEND;
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}
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return caps_flags;
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}
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static const char chip_name[] = "generic";
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const spi_flash_chip_t esp_flash_chip_generic = {
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@@ -501,6 +515,7 @@ const spi_flash_chip_t esp_flash_chip_generic = {
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.read_reg = spi_flash_chip_generic_read_reg,
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.yield = spi_flash_chip_generic_yield,
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.sus_setup = spi_flash_chip_generic_suspend_cmd_conf,
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.get_chip_caps = spi_flash_chip_generic_get_caps,
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};
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#ifndef CONFIG_SPI_FLASH_ROM_IMPL
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