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feat(spi_master): add test clock src and config validation
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@@ -19,7 +19,7 @@ extern "C" {
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*
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* 2) External 40MHz Crystal Clock: XTAL
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*
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* 3) Internal 136kHz RC Oscillator: RC_SLOW (may also referrred as SOSC in TRM or reg. description)
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* 3) Internal 136kHz RC Oscillator: RC_SLOW (may also referred as SOSC in TRM or reg. description)
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*
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* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
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* can be computed in runtime through calibration.
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