feat(spi_master): add test clock src and config validation

This commit is contained in:
wanlei
2023-02-08 19:06:04 +08:00
committed by wanckl
parent 915e1238f0
commit e24067295b
7 changed files with 103 additions and 101 deletions

View File

@@ -19,7 +19,7 @@ extern "C" {
*
* 2) External 40MHz Crystal Clock: XTAL
*
* 3) Internal 136kHz RC Oscillator: RC_SLOW (may also referrred as SOSC in TRM or reg. description)
* 3) Internal 136kHz RC Oscillator: RC_SLOW (may also referred as SOSC in TRM or reg. description)
*
* This RC oscillator generates a ~136kHz clock signal output as the RC_SLOW_CLK. The exact frequency of this clock
* can be computed in runtime through calibration.