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support c6 eco1 fosc calibration

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support c6 eco1 fosc calibration

support c6 eco1 fosc calibration

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support c6 eco1 fosc calibration

support c6 eco1 fosc calibration
This commit is contained in:
hongshuqing
2023-04-14 18:16:14 +08:00
parent c49c165bca
commit e3148369f3
4 changed files with 32 additions and 1 deletions
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17
components/hal/esp32c6/include/hal/clk_tree_ll.h
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@@ -40,6 +40,13 @@ extern "C" {
.dbuf = 1, \
}
/*
Set the frequency division factor of ref_tick
The FOSC of rtc calibration uses the 32 frequency division clock for ECO1,
So the frequency division factor of ref_tick must be greater than or equal to 32
*/
#define REG_FOSC_TICK_NUM 255
/**
* @brief XTAL32K_CLK enable modes
*/
@@ -798,6 +805,16 @@ static inline __attribute__((always_inline)) uint32_t clk_ll_rtc_slow_load_cal(v
return REG_READ(RTC_SLOW_CLK_CAL_REG);
}
/*
Set the frequency division factor of ref_tick
*/
static inline void clk_ll_rc_fast_tick_conf(void)
{
PCR.ctrl_tick_conf.fosc_tick_num = REG_FOSC_TICK_NUM;
}
#ifdef __cplusplus
}
#endif