mirror of
https://github.com/espressif/esp-idf.git
synced 2025-08-09 12:35:28 +00:00
fix(wdt): move non-auto generated wdt values to ll
This commit is contained in:
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
@@ -24,6 +24,22 @@ extern "C" {
|
||||
|
||||
#include "esp32c6/rom/ets_sys.h"
|
||||
|
||||
// TODO: IDF-5730 (better to rename and move to wdt_types.h?)
|
||||
/* The value that needs to be written to LP_WDT_WPROTECT_REG to write-enable the wdt registers */
|
||||
#define LP_WDT_WKEY_VALUE 0x50D83AA1
|
||||
/* The value that needs to be written to LP_WDT_SWD_WPROTECT_REG to write-enable the swd registers */
|
||||
#define LP_WDT_SWD_WKEY_VALUE 0x50D83AA1
|
||||
|
||||
/* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH and RTC_CNTL_WDT_SYS_RESET_LENGTH */
|
||||
#define RTC_WDT_RESET_LENGTH_100_NS 0
|
||||
#define RTC_WDT_RESET_LENGTH_200_NS 1
|
||||
#define RTC_WDT_RESET_LENGTH_300_NS 2
|
||||
#define RTC_WDT_RESET_LENGTH_400_NS 3
|
||||
#define RTC_WDT_RESET_LENGTH_500_NS 4
|
||||
#define RTC_WDT_RESET_LENGTH_800_NS 5
|
||||
#define RTC_WDT_RESET_LENGTH_1600_NS 6
|
||||
#define RTC_WDT_RESET_LENGTH_3200_NS 7
|
||||
|
||||
// TODO: IDF-5717
|
||||
// //Type check wdt_stage_action_t
|
||||
// ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == RTC_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
|
||||
@@ -268,7 +284,7 @@ FORCE_INLINE_ATTR void lpwdt_ll_write_protect_enable(lp_wdt_dev_t *hw)
|
||||
*/
|
||||
FORCE_INLINE_ATTR void lpwdt_ll_write_protect_disable(lp_wdt_dev_t *hw)
|
||||
{
|
||||
hw->wprotect.val = RTC_CNTL_WDT_WKEY_VALUE;
|
||||
hw->wprotect.val = LP_WDT_WKEY_VALUE;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@@ -27,6 +27,24 @@ extern "C" {
|
||||
/* Pre-calculated prescaler to achieve 500 ticks/us (MWDT1_TICKS_PER_US) when using default clock (MWDT_CLK_SRC_DEFAULT ) */
|
||||
#define MWDT_LL_DEFAULT_CLK_PRESCALER 40000
|
||||
|
||||
/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
|
||||
#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
|
||||
|
||||
/* Possible values for TIMG_WDT_STGx */
|
||||
#define TIMG_WDT_STG_SEL_OFF 0
|
||||
#define TIMG_WDT_STG_SEL_INT 1
|
||||
#define TIMG_WDT_STG_SEL_RESET_CPU 2
|
||||
#define TIMG_WDT_STG_SEL_RESET_SYSTEM 3
|
||||
|
||||
#define TIMG_WDT_RESET_LENGTH_100_NS 0
|
||||
#define TIMG_WDT_RESET_LENGTH_200_NS 1
|
||||
#define TIMG_WDT_RESET_LENGTH_300_NS 2
|
||||
#define TIMG_WDT_RESET_LENGTH_400_NS 3
|
||||
#define TIMG_WDT_RESET_LENGTH_500_NS 4
|
||||
#define TIMG_WDT_RESET_LENGTH_800_NS 5
|
||||
#define TIMG_WDT_RESET_LENGTH_1600_NS 6
|
||||
#define TIMG_WDT_RESET_LENGTH_3200_NS 7
|
||||
|
||||
//Type check wdt_stage_action_t
|
||||
ESP_STATIC_ASSERT(WDT_STAGE_ACTION_OFF == TIMG_WDT_STG_SEL_OFF, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
|
||||
ESP_STATIC_ASSERT(WDT_STAGE_ACTION_INT == TIMG_WDT_STG_SEL_INT, "Add mapping to LL watchdog timeout behavior, since it's no longer naturally compatible with wdt_stage_action_t");
|
||||
|
Reference in New Issue
Block a user