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fix(wdt): move non-auto generated wdt values to ll
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@@ -1,27 +1,11 @@
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/*
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* SPDX-FileCopyrightText: 2020-2022 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2020-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef _SOC_RTC_CNTL_REG_H_
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#define _SOC_RTC_CNTL_REG_H_
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/* The value that needs to be written to RTC_CNTL_WDT_WKEY to write-enable the wdt registers */
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#define RTC_CNTL_WDT_WKEY_VALUE 0x50D83AA1
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/* The value that needs to be written to RTC_CNTL_SWD_WPROTECT_REG to write-enable the wdt registers */
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#define RTC_CNTL_SWD_WKEY_VALUE 0x8F1D312A
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/* Possible values for RTC_CNTL_WDT_CPU_RESET_LENGTH and RTC_CNTL_WDT_SYS_RESET_LENGTH */
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#define RTC_WDT_RESET_LENGTH_100_NS 0
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#define RTC_WDT_RESET_LENGTH_200_NS 1
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#define RTC_WDT_RESET_LENGTH_300_NS 2
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#define RTC_WDT_RESET_LENGTH_400_NS 3
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#define RTC_WDT_RESET_LENGTH_500_NS 4
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#define RTC_WDT_RESET_LENGTH_800_NS 5
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#define RTC_WDT_RESET_LENGTH_1600_NS 6
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#define RTC_WDT_RESET_LENGTH_3200_NS 7
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#ifdef __cplusplus
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extern "C" {
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#endif
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@@ -1,5 +1,5 @@
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/**
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* SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD
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* SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@@ -13,25 +13,6 @@ extern "C" {
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#define DR_REG_TIMG_BASE(i) REG_TIMG_BASE(i)
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/* The value that needs to be written to TIMG_WDT_WKEY to write-enable the wdt registers */
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#define TIMG_WDT_WKEY_VALUE 0x50D83AA1
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/* Possible values for TIMG_WDT_STGx */
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#define TIMG_WDT_STG_SEL_OFF 0
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#define TIMG_WDT_STG_SEL_INT 1
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#define TIMG_WDT_STG_SEL_RESET_CPU 2
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#define TIMG_WDT_STG_SEL_RESET_SYSTEM 3
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/* Possible values for TIMG_WDT_CPU_RESET_LENGTH and TIMG_WDT_SYS_RESET_LENGTH */
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#define TIMG_WDT_RESET_LENGTH_100_NS 0
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#define TIMG_WDT_RESET_LENGTH_200_NS 1
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#define TIMG_WDT_RESET_LENGTH_300_NS 2
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#define TIMG_WDT_RESET_LENGTH_400_NS 3
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#define TIMG_WDT_RESET_LENGTH_500_NS 4
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#define TIMG_WDT_RESET_LENGTH_800_NS 5
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#define TIMG_WDT_RESET_LENGTH_1600_NS 6
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#define TIMG_WDT_RESET_LENGTH_3200_NS 7
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/** TIMG_T0CONFIG_REG register
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* Timer 0 configuration register
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*/
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