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feat(esp_hw_support): support enable analog lowpower mode by API

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Closes https://github.com/espressif/esp-idf/issues/7882
This commit is contained in:
wuzhenghui
2025-06-08 11:28:57 +08:00
parent 0fa5b07c7e
commit e55d6d8b3c
7 changed files with 56 additions and 5 deletions
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4
components/esp_hw_support/port/esp32/include/soc/rtc.h
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@@ -508,6 +508,7 @@ typedef struct rtc_sleep_config_s {
uint32_t dig_dbias_slp : 3; //!< set bias for digital domain, in sleep mode
uint32_t rtc_dbias_wak : 3; //!< set bias for RTC domain, in active mode
uint32_t rtc_dbias_slp : 3; //!< set bias for RTC domain, in sleep mode
uint32_t dbias_follow_8m : 1; //!< raise voltage if RTC 8MCLK is enabled
uint32_t lslp_meminf_pd : 1; //!< remove all peripheral force power up flags
uint32_t vddsdio_pd_en : 1; //!< power down VDDSDIO regulator
uint32_t xtal_fpu : 1; //!< keep main XTAL powered up in sleep
@@ -527,6 +528,9 @@ typedef struct rtc_sleep_config_s {
#define RTC_SLEEP_PD_INT_8M BIT(8) //!< Power down Internal 8M oscillator
//These flags are not power domains, but will affect some sleep parameters
#if CONFIG_IDF_TARGET_ESP32
#define RTC_SLEEP_WITH_LOWPOWER_ANALOG BIT(15) //!< Setting analog low power mode in esp32 monitor state, in which analog-related peripherals(ADC, TOUCH) is not used.
#endif
#define RTC_SLEEP_DIG_USE_8M BIT(16)
#define RTC_SLEEP_USE_ADC_TESEN_MONITOR BIT(17)
#define RTC_SLEEP_NO_ULTRA_LOW BIT(18) //!< Avoid using ultra low power in deep sleep, in which RTCIO cannot be used as input, and RTCMEM can't work under high temperature

17
components/esp_hw_support/port/esp32/rtc_sleep.c
View File

@@ -116,6 +116,13 @@ void rtc_sleep_get_default_config(uint32_t sleep_flags, rtc_sleep_config_t *out_
out_config->rtc_dbias_slp = !((sleep_flags) & RTC_SLEEP_PD_INT_8M) ? RTC_CNTL_DBIAS_1V10 : RTC_CNTL_DBIAS_0V90;
out_config->dbg_atten_slp = RTC_CNTL_DBG_ATTEN_NODROP;
}
if (sleep_flags & RTC_SLEEP_WITH_LOWPOWER_ANALOG) {
out_config->dbias_follow_8m = 0;
} else {
// make sure voltage is raised when RTC 8MCLK is enabled
out_config->dbias_follow_8m = 1;
}
}
void rtc_sleep_init(rtc_sleep_config_t cfg)
@@ -221,6 +228,16 @@ void rtc_sleep_init(rtc_sleep_config_t cfg)
REG_CLR_BIT(RTC_CNTL_CLK_CONF_REG, RTC_CNTL_CK8M_FORCE_PU);
}
if (cfg.dbias_follow_8m) {
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_CORE_FOLW_8M);
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_I2C_FOLW_8M);
SET_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_SLEEP_FOLW_8M);
} else {
CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_CORE_FOLW_8M);
CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_I2C_FOLW_8M);
CLEAR_PERI_REG_MASK(RTC_CNTL_OPTIONS0_REG, RTC_CNTL_BIAS_SLEEP_FOLW_8M);
}
/* enable VDDSDIO control by state machine */
REG_CLR_BIT(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_FORCE);
REG_SET_FIELD(RTC_CNTL_SDIO_CONF_REG, RTC_CNTL_SDIO_PD_EN, cfg.vddsdio_pd_en);