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fix(esp_hw_support): fix p4 OTG phy bad suspend cause high power consumption on sleep

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This commit is contained in:
wuzhenghui
2024-12-17 17:03:58 +08:00
parent a5581e8117
commit e6808779dc
7 changed files with 106 additions and 2 deletions
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10
components/hal/esp32p4/include/hal/usb_utmi_ll.h
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@@ -50,6 +50,16 @@ FORCE_INLINE_ATTR void _usb_utmi_ll_enable_bus_clock(bool clk_en)
// HP_SYS_CLKRST.soc_clk_ctrlx and LP_AON_CLKRST.hp_usb_clkrst_ctrlx are shared registers, so this function must be used in an atomic way
#define usb_utmi_ll_enable_bus_clock(...) (void)__DECLARE_RCC_ATOMIC_ENV; _usb_utmi_ll_enable_bus_clock(__VA_ARGS__)
/**
* Get the enable status of the USB UTMI PHY bus clock
*
* @return Return true if USB UTMI PHY bus clock is enabled
*/
FORCE_INLINE_ATTR bool _usb_utmi_ll_bus_clock_is_enabled(void)
{
return (HP_SYS_CLKRST.soc_clk_ctrl1.reg_usb_otg20_sys_clk_en && LP_AON_CLKRST.hp_usb_clkrst_ctrl1.usb_otg20_phyref_clk_en);
}
/**
* @brief Reset the USB UTMI PHY and USB_DWC_HS controller
*/